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Date:	Sun, 30 Aug 2015 05:39:54 +0000 (UTC)
From:	"Keantoken (keantoken AT yahoo DOT com) [via geda-help AT delorie DOT com]" <geda-help AT delorie DOT com>
To:	"geda-help AT delorie DOT com" <geda-help AT delorie DOT com>
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Subject:	Re: [geda-help] General PCB Layout Question on Two Layer Board
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This is one of the most difficult problems of PCB design I think. Making a =
2-sided board that's not susceptible to EMI means coupling the signal and r=
eturn paths as well as the power paths. You want all significant currents t=
o be in pairs so that the fields will cancel. It helps to know which nodes =
in your circuit are susceptible to leakage from which other nodes and which=
 kind of parasitics. You can identify several traces which hardly matter at=
 all and abuse them to make room for the important traces. And often you ca=
n also say that a parasitic will be helpful at a certain node.
Using a uniform ground plane with a 2-layer board means your traces may hav=
e to be MUCH longer and thinner in order to get everything without jumpers.=
 So a good question to ask is, when do the parasitics of a long and/or thin=
 trace outweigh the benefits of a ground plane?=20


     On Sunday, August 30, 2015 12:05 AM, "Stan Katz (stan DOT katz DOT hk AT gmail DOT co=
m) [via geda-help AT delorie DOT com]" <geda-help AT delorie DOT com> wrote:
  =20

 First, I would like to mention that although I'm just a hobbyist, I lurk o=
n geda-user. I had been hoping and watching to see if a new PCB was going t=
o be released. I don't intend to understand the subtleties of the discussio=
ns on geda-user, but I did note igor2's pcb-rnd fork was available. I didn'=
t think I would bother with it, since it wasn't official, but a problem cro=
pped up, that made me change my mind. I had laid out a board in 1.9.1 which=
 I compiled from source. When I tried to export the board to Postscript, 1.=
9.1, PCB segfaulted. I switched to my distribution's PCB =C2=A0(20140316) a=
nd that version also segfaulted. I decided that I should try pcb-rnd. Lucky=
 for me, pcb-rnd didn't segfault. The trace colors were also nicely saturat=
ed, and easier on my old eyes. Give Igor2 one thumbs up from a rank amateur=
 hobbyist....for what that's worth.=C2=A0
Now, to get down to my issue, I'm hoping that you can guide me towards a bo=
ok on producing excellent two layer boards for precision analog projects. Y=
ou pros probably reference books from Montrose, and Ott for your work. That=
's great for 4 layers and up. These sources dismiss 2 layer board from the =
get go. The only advise directed towards 2 layer I could find was in a TI j=
ournal. That advise, was....use one layer devoted entirely to ground, and t=
hen spend the rest of your life soldering jumpers on the component layer. N=
O THANK YOU! Talented engineers back in the '60s and '70s were able to prod=
uce quality two sided analog boards without jumpers. There must have been a=
 book, or two ( undoubtedly out of print now ) that guided designers back t=
hen.
Can you help me out here?
Stan

  
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<html><body><div style=3D"color:#000; background-color:#fff; font-family:He=
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nt-size:12px"><div id=3D"yiv8257561529"><div id=3D"yui_3_16_0_1_14408835536=
57_114759"><div style=3D"color:#000;background-color:#fff;font-family:Helve=
ticaNeue, Helvetica Neue, Helvetica, Arial, Lucida Grande, sans-serif;font-=
size:12px;" id=3D"yui_3_16_0_1_1440883553657_114758"><div dir=3D"ltr" id=3D=
"yiv8257561529yui_3_16_0_1_1440883553657_109549"><span id=3D"yiv8257561529y=
ui_3_16_0_1_1440883553657_109620">This is one of the most difficult problem=
s of PCB design I think. Making a 2-sided board that's not susceptible to E=
MI means coupling the signal and return paths as well as the power paths. Y=
ou want all significant currents to be in pairs so that the fields will can=
cel. It helps to know which nodes in your circuit are susceptible to leakag=
e from which other nodes and which kind of parasitics. You can identify sev=
eral traces which hardly matter at all and abuse them to make room for the =
important traces. And often you can also say that a parasitic will be helpf=
ul at a certain node.</span></div><div dir=3D"ltr" id=3D"yiv8257561529yui_3=
_16_0_1_1440883553657_109549"><span><br></span></div><div dir=3D"ltr" id=3D=
"yiv8257561529yui_3_16_0_1_1440883553657_109549">Using a uniform ground pla=
ne with a 2-layer board means your traces may have to be MUCH longer and th=
inner in order to get everything without jumpers. So a good question to ask=
 is, when do the parasitics of a long and/or thin trace outweigh the benefi=
ts of a ground plane?</div>  <br clear=3D"none"><div class=3D"yiv8257561529=
qtdSeparateBR" id=3D"yui_3_16_0_1_1440883553657_114760"><br clear=3D"none">=
<br clear=3D"none"></div><div class=3D"yiv8257561529yqt8708156728" id=3D"yi=
v8257561529yqt87437"></div></div></div></div><div class=3D".yiv8257561529ya=
hoo_quoted"> <div style=3D"font-family:HelveticaNeue, Helvetica Neue, Helve=
tica, Arial, Lucida Grande, sans-serif;font-size:12px;"> <div style=3D"font=
-family:HelveticaNeue, Helvetica Neue, Helvetica, Arial, Lucida Grande, san=
s-serif;font-size:16px;"> <div dir=3D"ltr"> <font size=3D"2" face=3D"Arial"=
> On Sunday, August 30, 2015 12:05 AM, "Stan Katz (stan DOT katz DOT hk AT gmail DOT com) =
[via geda-help AT delorie DOT com]" &lt;geda-help AT delorie DOT com&gt; wrote:<br clear=
=3D"none"> </font> </div>  <br clear=3D"none"><br clear=3D"none"> <div clas=
s=3D"yiv8257561529y_msg_container"><div id=3D"yiv8257561529"><div dir=3D"lt=
r">First, I would like to mention that although I'm just a hobbyist, I lurk=
 on geda-user. I had been hoping and watching to see if a new PCB was going=
 to be released. I don't intend to understand the subtleties of the discuss=
ions on geda-user, but I did note igor2's pcb-rnd fork was available. I did=
n't think I would bother with it, since it wasn't official, but a problem c=
ropped up, that made me change my mind. I had laid out a board in 1.9.1 whi=
ch I compiled from source. When I tried to export the board to Postscript, =
1.9.1, PCB segfaulted. I switched to my distribution's PCB &nbsp;(20140316)=
 and that version also segfaulted. I decided that I should try pcb-rnd. Luc=
ky for me, pcb-rnd didn't segfault. The trace colors were also nicely satur=
ated, and easier on my old eyes. Give Igor2 one thumbs up from a rank amate=
ur hobbyist....for what that's worth.&nbsp;<div><br clear=3D"none"></div><d=
iv>Now, to get down to my issue, I'm hoping that you can guide me towards a=
 book on producing excellent two layer boards for precision analog projects=
. You pros probably reference books from Montrose, and Ott for your work. T=
hat's great for 4 layers and up. These sources dismiss 2 layer board from t=
he get go. The only advise directed towards 2 layer I could find was in a T=
I journal. That advise, was....use one layer devoted entirely to ground, an=
d then spend the rest of your life soldering jumpers on the component layer=
. NO THANK YOU! Talented engineers back in the '60s and '70s were able to p=
roduce quality two sided analog boards without jumpers. There must have bee=
n a book, or two ( undoubtedly out of print now ) that guided designers bac=
k then.</div><div><br clear=3D"none"></div><div>Can you help me out here?</=
div><div><br clear=3D"none"></div><div>Stan</div></div></div><br clear=3D"n=
one"><br clear=3D"none"></div>  </div> </div>  </div></div></body></html>
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