From patchwork Tue May 28 11:48:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alejandro Colomar X-Patchwork-Id: 91013 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 476CD384AB5D for ; Tue, 28 May 2024 11:48:44 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by sourceware.org (Postfix) with ESMTPS id F0C81385841C for ; Tue, 28 May 2024 11:48:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org F0C81385841C Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=kernel.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org F0C81385841C Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2604:1380:4641:c500::1 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716896897; cv=none; b=FU0O8Xt98eG1Lk+Wj8sL3ioGlfgMMlVABQn0a/1k7HMd8oHTXuqH9ha7RpoymNAk7gkruFc+VjbJe5Q/04efBuPXLS+wzq4mGEg11XiKSK1ULa4vtbcjEV8kuIFXxVsJLbJfZJ2EKP4bQjBAq/1HmezKl9qiSOdlxxPYKCIA7yA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716896897; c=relaxed/simple; bh=/3R7Lok4WL8HaPiOOfTeRyYmBXF3VIcE0RLZlmUPJ1U=; h=DKIM-Signature:Date:From:To:Subject:Message-ID:MIME-Version; b=PTWxyTdL1l17n5lYdLYfMfJMsI5Sknw4y8E3andRJrIKYF0hthLZuEY5rlNAA9Nib0uiyOuKDcVgOnAGCGXcRYbTstLxDj3k+VnAG0ZyWF7oE4j/X9uB8abVtRqwDMqAlGb5WBHYiatC1/fLUW1IMB0MYM/+OC6TBq6PalSZAUc= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 8DA9262022 for ; Tue, 28 May 2024 11:48:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 363FAC3277B; Tue, 28 May 2024 11:48:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1716896889; bh=/3R7Lok4WL8HaPiOOfTeRyYmBXF3VIcE0RLZlmUPJ1U=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Q6jbRQIqnhjqJqYASXVF7vvcT6m6l5AIAQwBV2USNLfUhycYefcVrHtRZEC5J5l3q mCFDb1Wa6k2kz2d3rv8B+tdK+J7UfEaM9KEpvZ8ofTaaX34EcgoFh1d52tU7m+qvfb RwpmKk08M3YsJsBtDXFDPiQWskjs1G81Nr/f0M9NYbXrfFiShiBlPQMGE7zvCuO2UK u51tsVlGnlC/0H/AWE6Qs7amE0lb9OCZdgR0YOYc8UBb6oJ4q1stQI8UAJLEato9IU Wmc88DWpZuWJ8BPiV0SY5ILulwd5yiFbvTbRhoznGFWMLdnKoUkTCuM6FsbYsPkPQU V7TvKFLu6XoBg== Date: Tue, 28 May 2024 13:48:06 +0200 From: Alejandro Colomar To: linux-api@vger.kernel.org Cc: linux-man@vger.kernel.org, libc-alpha@sourceware.org, Alejandro Colomar Subject: [PATCH v1 1/2] uapi/linux/prctl: Use the L integer suffix for enumerations of width long Message-ID: <20240528114750.106187-2-alx@kernel.org> X-Mailer: git-send-email 2.45.1 References: <20240528114750.106187-1-alx@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240528114750.106187-1-alx@kernel.org> X-Spam-Status: No, score=-10.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org The prctl(2) wrapper provided by glibc uses a variadic argument list. This means that the arguments *must* have the right type (and more importantly, the right width). To avoid the user having to cast these constants, provide them with the appropriate width, that of a long. Having the width of a long is sufficient, and we don't need UL. Let's reserve that suffix for bit fields, which need to be unsigned to avoid easily triggering undefined (or implementation-defined) behavior. Link: Cc: Cc: Cc: Signed-off-by: Alejandro Colomar --- include/uapi/linux/prctl.h | 126 ++++++++++++++++++------------------- 1 file changed, 63 insertions(+), 63 deletions(-) diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h index 35791791a879..60e14adb8d20 100644 --- a/include/uapi/linux/prctl.h +++ b/include/uapi/linux/prctl.h @@ -16,8 +16,8 @@ /* Get/set unaligned access control bits (if meaningful) */ #define PR_GET_UNALIGN 5 #define PR_SET_UNALIGN 6 -# define PR_UNALIGN_NOPRINT 1 /* silently fix up unaligned user accesses */ -# define PR_UNALIGN_SIGBUS 2 /* generate SIGBUS on unaligned user access */ +# define PR_UNALIGN_NOPRINT 1L /* silently fix up unaligned user accesses */ +# define PR_UNALIGN_SIGBUS 2L /* generate SIGBUS on unaligned user access */ /* Get/set whether or not to drop capabilities on setuid() away from * uid 0 (as per security/commoncap.c) */ @@ -27,8 +27,8 @@ /* Get/set floating-point emulation control bits (if meaningful) */ #define PR_GET_FPEMU 9 #define PR_SET_FPEMU 10 -# define PR_FPEMU_NOPRINT 1 /* silently emulate fp operations accesses */ -# define PR_FPEMU_SIGFPE 2 /* don't emulate fp operations, send SIGFPE instead */ +# define PR_FPEMU_NOPRINT 1L /* silently emulate fp operations accesses */ +# define PR_FPEMU_SIGFPE 2L /* don't emulate fp operations, send SIGFPE instead */ /* Get/set floating-point exception mode (if meaningful) */ #define PR_GET_FPEXC 11 @@ -39,18 +39,18 @@ # define PR_FP_EXC_UND 0x040000 /* floating point underflow */ # define PR_FP_EXC_RES 0x080000 /* floating point inexact result */ # define PR_FP_EXC_INV 0x100000 /* floating point invalid operation */ -# define PR_FP_EXC_DISABLED 0 /* FP exceptions disabled */ -# define PR_FP_EXC_NONRECOV 1 /* async non-recoverable exc. mode */ -# define PR_FP_EXC_ASYNC 2 /* async recoverable exception mode */ -# define PR_FP_EXC_PRECISE 3 /* precise exception mode */ +# define PR_FP_EXC_DISABLED 0L /* FP exceptions disabled */ +# define PR_FP_EXC_NONRECOV 1L /* async non-recoverable exc. mode */ +# define PR_FP_EXC_ASYNC 2L /* async recoverable exception mode */ +# define PR_FP_EXC_PRECISE 3L /* precise exception mode */ /* Get/set whether we use statistical process timing or accurate timestamp * based process timing */ #define PR_GET_TIMING 13 #define PR_SET_TIMING 14 -# define PR_TIMING_STATISTICAL 0 /* Normal, traditional, +# define PR_TIMING_STATISTICAL 0L /* Normal, traditional, statistical process timing */ -# define PR_TIMING_TIMESTAMP 1 /* Accurate timestamp based +# define PR_TIMING_TIMESTAMP 1L /* Accurate timestamp based process timing */ #define PR_SET_NAME 15 /* Set process name */ @@ -59,9 +59,9 @@ /* Get/set process endian */ #define PR_GET_ENDIAN 19 #define PR_SET_ENDIAN 20 -# define PR_ENDIAN_BIG 0 -# define PR_ENDIAN_LITTLE 1 /* True little endian mode */ -# define PR_ENDIAN_PPC_LITTLE 2 /* "PowerPC" pseudo little endian */ +# define PR_ENDIAN_BIG 0L +# define PR_ENDIAN_LITTLE 1L /* True little endian mode */ +# define PR_ENDIAN_PPC_LITTLE 2L /* "PowerPC" pseudo little endian */ /* Get/set process seccomp mode */ #define PR_GET_SECCOMP 21 @@ -74,8 +74,8 @@ /* Get/set the process' ability to use the timestamp counter instruction */ #define PR_GET_TSC 25 #define PR_SET_TSC 26 -# define PR_TSC_ENABLE 1 /* allow the use of the timestamp counter */ -# define PR_TSC_SIGSEGV 2 /* throw a SIGSEGV instead of reading the TSC */ +# define PR_TSC_ENABLE 1L /* allow the use of the timestamp counter */ +# define PR_TSC_SIGSEGV 2L /* throw a SIGSEGV instead of reading the TSC */ /* Get/set securebits (as per security/commoncap.c) */ #define PR_GET_SECUREBITS 27 @@ -96,12 +96,12 @@ * This influences when the process gets killed on a memory corruption. */ #define PR_MCE_KILL 33 -# define PR_MCE_KILL_CLEAR 0 -# define PR_MCE_KILL_SET 1 +# define PR_MCE_KILL_CLEAR 0L +# define PR_MCE_KILL_SET 1L -# define PR_MCE_KILL_LATE 0 -# define PR_MCE_KILL_EARLY 1 -# define PR_MCE_KILL_DEFAULT 2 +# define PR_MCE_KILL_LATE 0L +# define PR_MCE_KILL_EARLY 1L +# define PR_MCE_KILL_DEFAULT 2L #define PR_MCE_KILL_GET 34 @@ -109,21 +109,21 @@ * Tune up process memory map specifics. */ #define PR_SET_MM 35 -# define PR_SET_MM_START_CODE 1 -# define PR_SET_MM_END_CODE 2 -# define PR_SET_MM_START_DATA 3 -# define PR_SET_MM_END_DATA 4 -# define PR_SET_MM_START_STACK 5 -# define PR_SET_MM_START_BRK 6 -# define PR_SET_MM_BRK 7 -# define PR_SET_MM_ARG_START 8 -# define PR_SET_MM_ARG_END 9 -# define PR_SET_MM_ENV_START 10 -# define PR_SET_MM_ENV_END 11 -# define PR_SET_MM_AUXV 12 -# define PR_SET_MM_EXE_FILE 13 -# define PR_SET_MM_MAP 14 -# define PR_SET_MM_MAP_SIZE 15 +# define PR_SET_MM_START_CODE 1L +# define PR_SET_MM_END_CODE 2L +# define PR_SET_MM_START_DATA 3L +# define PR_SET_MM_END_DATA 4L +# define PR_SET_MM_START_STACK 5L +# define PR_SET_MM_START_BRK 6L +# define PR_SET_MM_BRK 7L +# define PR_SET_MM_ARG_START 8L +# define PR_SET_MM_ARG_END 9L +# define PR_SET_MM_ENV_START 10L +# define PR_SET_MM_ENV_END 11L +# define PR_SET_MM_AUXV 12L +# define PR_SET_MM_EXE_FILE 13L +# define PR_SET_MM_MAP 14L +# define PR_SET_MM_MAP_SIZE 15L /* * This structure provides new memory descriptor @@ -193,10 +193,10 @@ struct prctl_mm_map { /* Control the ambient capability set */ #define PR_CAP_AMBIENT 47 -# define PR_CAP_AMBIENT_IS_SET 1 -# define PR_CAP_AMBIENT_RAISE 2 -# define PR_CAP_AMBIENT_LOWER 3 -# define PR_CAP_AMBIENT_CLEAR_ALL 4 +# define PR_CAP_AMBIENT_IS_SET 1L +# define PR_CAP_AMBIENT_RAISE 2L +# define PR_CAP_AMBIENT_LOWER 3L +# define PR_CAP_AMBIENT_CLEAR_ALL 4L /* arm64 Scalable Vector Extension controls */ /* Flag values must be kept in sync with ptrace NT_ARM_SVE interface */ @@ -211,9 +211,9 @@ struct prctl_mm_map { #define PR_GET_SPECULATION_CTRL 52 #define PR_SET_SPECULATION_CTRL 53 /* Speculation control variants */ -# define PR_SPEC_STORE_BYPASS 0 -# define PR_SPEC_INDIRECT_BRANCH 1 -# define PR_SPEC_L1D_FLUSH 2 +# define PR_SPEC_STORE_BYPASS 0L +# define PR_SPEC_INDIRECT_BRANCH 1L +# define PR_SPEC_L1D_FLUSH 2L /* Return and control values for PR_SET/GET_SPECULATION_CTRL */ # define PR_SPEC_NOT_AFFECTED 0 # define PR_SPEC_PRCTL (1UL << 0) @@ -251,11 +251,11 @@ struct prctl_mm_map { /* Dispatch syscalls to a userspace handler */ #define PR_SET_SYSCALL_USER_DISPATCH 59 -# define PR_SYS_DISPATCH_OFF 0 -# define PR_SYS_DISPATCH_ON 1 +# define PR_SYS_DISPATCH_OFF 0L +# define PR_SYS_DISPATCH_ON 1L /* The control values for the user space selector when dispatch is enabled */ -# define SYSCALL_DISPATCH_FILTER_ALLOW 0 -# define SYSCALL_DISPATCH_FILTER_BLOCK 1 +# define SYSCALL_DISPATCH_FILTER_ALLOW 0L +# define SYSCALL_DISPATCH_FILTER_BLOCK 1L /* Set/get enabled arm64 pointer authentication keys */ #define PR_PAC_SET_ENABLED_KEYS 60 @@ -263,14 +263,14 @@ struct prctl_mm_map { /* Request the scheduler to share a core */ #define PR_SCHED_CORE 62 -# define PR_SCHED_CORE_GET 0 -# define PR_SCHED_CORE_CREATE 1 /* create unique core_sched cookie */ -# define PR_SCHED_CORE_SHARE_TO 2 /* push core_sched cookie to pid */ -# define PR_SCHED_CORE_SHARE_FROM 3 /* pull core_sched cookie to pid */ -# define PR_SCHED_CORE_MAX 4 -# define PR_SCHED_CORE_SCOPE_THREAD 0 -# define PR_SCHED_CORE_SCOPE_THREAD_GROUP 1 -# define PR_SCHED_CORE_SCOPE_PROCESS_GROUP 2 +# define PR_SCHED_CORE_GET 0L +# define PR_SCHED_CORE_CREATE 1L /* create unique core_sched cookie */ +# define PR_SCHED_CORE_SHARE_TO 2L /* push core_sched cookie to pid */ +# define PR_SCHED_CORE_SHARE_FROM 3L /* pull core_sched cookie to pid */ +# define PR_SCHED_CORE_MAX 4L +# define PR_SCHED_CORE_SCOPE_THREAD 0L +# define PR_SCHED_CORE_SCOPE_THREAD_GROUP 1L +# define PR_SCHED_CORE_SCOPE_PROCESS_GROUP 2L /* arm64 Scalable Matrix Extension controls */ /* Flag values must be in sync with SVE versions */ @@ -289,7 +289,7 @@ struct prctl_mm_map { #define PR_GET_MDWE 66 #define PR_SET_VMA 0x53564d41 -# define PR_SET_VMA_ANON_NAME 0 +# define PR_SET_VMA_ANON_NAME 0L #define PR_GET_AUXV 0x41555856 @@ -307,19 +307,19 @@ struct prctl_mm_map { # define PR_RISCV_V_VSTATE_CTRL_MASK 0x1f #define PR_RISCV_SET_ICACHE_FLUSH_CTX 71 -# define PR_RISCV_CTX_SW_FENCEI_ON 0 -# define PR_RISCV_CTX_SW_FENCEI_OFF 1 -# define PR_RISCV_SCOPE_PER_PROCESS 0 -# define PR_RISCV_SCOPE_PER_THREAD 1 +# define PR_RISCV_CTX_SW_FENCEI_ON 0L +# define PR_RISCV_CTX_SW_FENCEI_OFF 1L +# define PR_RISCV_SCOPE_PER_PROCESS 0L +# define PR_RISCV_SCOPE_PER_THREAD 1L /* PowerPC Dynamic Execution Control Register (DEXCR) controls */ #define PR_PPC_GET_DEXCR 72 #define PR_PPC_SET_DEXCR 73 /* DEXCR aspect to act on */ -# define PR_PPC_DEXCR_SBHE 0 /* Speculative branch hint enable */ -# define PR_PPC_DEXCR_IBRTPD 1 /* Indirect branch recurrent target prediction disable */ -# define PR_PPC_DEXCR_SRAPD 2 /* Subroutine return address prediction disable */ -# define PR_PPC_DEXCR_NPHIE 3 /* Non-privileged hash instruction enable */ +# define PR_PPC_DEXCR_SBHE 0L /* Speculative branch hint enable */ +# define PR_PPC_DEXCR_IBRTPD 1L /* Indirect branch recurrent target prediction disable */ +# define PR_PPC_DEXCR_SRAPD 2L /* Subroutine return address prediction disable */ +# define PR_PPC_DEXCR_NPHIE 3L /* Non-privileged hash instruction enable */ /* Action to apply / return */ # define PR_PPC_DEXCR_CTRL_EDITABLE 0x1 /* Aspect can be modified with PR_PPC_SET_DEXCR */ # define PR_PPC_DEXCR_CTRL_SET 0x2 /* Set the aspect for this process */ From patchwork Tue May 28 11:48:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alejandro Colomar X-Patchwork-Id: 91014 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 98504385E458 for ; Tue, 28 May 2024 11:49:15 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by sourceware.org (Postfix) with ESMTPS id F088C385EC59 for ; Tue, 28 May 2024 11:48:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org F088C385EC59 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=kernel.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org F088C385EC59 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=139.178.84.217 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716896896; cv=none; b=ClN293t75r5Y6D7/FGHKXhNa22/5Hc7xKC/W6p68RfoQiFwdTB1JgmoerPepqgvxUDhP7Pl+f0pgJzP0yDxFhvIQhu45vk7SbWU2T7BVfD95Jn4zMoYyiF8TT1hSpT6Edz48j6KEhl2ygVOY5U8tdK6J1Nc7Ze/0g0v63UO0xSE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716896896; c=relaxed/simple; bh=XeJxIi6a14rjilHcl8l3kQ5okk7lmMem0yEff2Bo8mg=; h=DKIM-Signature:Date:From:To:Subject:Message-ID:MIME-Version; b=kmfpqILZsLn6m5XHD5fKgSVF8jY9mVNIcYQzPuIlSGcO3XNaYxxkSlWcv6SVYqDjJil9SFd4xRoHVvyhg4bG8q2B22QC1eyBbxwpkh70C6MvuBpvKo1+VVB4eCr17puo3Qqv9vaRkE9iGzSIyZktdyIiPMvcdQpngRK3jNKr00M= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 8C40A6202B for ; Tue, 28 May 2024 11:48:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 39872C3277B; Tue, 28 May 2024 11:48:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1716896893; bh=XeJxIi6a14rjilHcl8l3kQ5okk7lmMem0yEff2Bo8mg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=nG44VyNIHnIx++HWkJExvRPBLAlMzM4Z7uZRrF2a3yBn7+MXwMm8U2u85VSB2J1SJ w2vVen2+NivkzUQ67RYEwdnw28Cizh8IFwlfMs62YHsM0HNF8UnPF3lrL3kW9lsm99 82IcvBePDFuHb6f67FPbVQ9LFaoeTHk9rzo1FXUiRq6XXGYVJgBoPoMCG4tJ3HDYfi GzmZWfrcwKA9V72kRGvtD09rPjO0AT8mkadlrXpBH4+FVnfEbeHoqUqjs5wlSM2IEf SgKbBCsQZUvJTvoo6PibWJOVVtZ5d42Oe4/3tUwCPWIKxNAK52beln3ZQa3XVVCnje d2dxdSLsotFoA== Date: Tue, 28 May 2024 13:48:10 +0200 From: Alejandro Colomar To: linux-api@vger.kernel.org Cc: linux-man@vger.kernel.org, libc-alpha@sourceware.org, Alejandro Colomar Subject: [PATCH v1 2/2] uapi/linux/prctl: Use the UL integer suffix for bit fields of width long Message-ID: <20240528114750.106187-3-alx@kernel.org> X-Mailer: git-send-email 2.45.1 References: <20240528114750.106187-1-alx@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240528114750.106187-1-alx@kernel.org> X-Spam-Status: No, score=-10.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org The prctl(2) wrapper provided by glibc uses a variadic argument list. This means that the arguments *must* have the right type (and more importantly, the right width). To avoid the user having to cast these constants, provide them with the appropriate width, that of a long. These are bit fields, and bitwise operations are dangerous on signed integers, so let's make sure they are unsigned. Link: Cc: Cc: Cc: Signed-off-by: Alejandro Colomar --- include/uapi/linux/prctl.h | 60 +++++++++++++++++++------------------- 1 file changed, 30 insertions(+), 30 deletions(-) diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h index 60e14adb8d20..c016c316f3c5 100644 --- a/include/uapi/linux/prctl.h +++ b/include/uapi/linux/prctl.h @@ -33,12 +33,12 @@ /* Get/set floating-point exception mode (if meaningful) */ #define PR_GET_FPEXC 11 #define PR_SET_FPEXC 12 -# define PR_FP_EXC_SW_ENABLE 0x80 /* Use FPEXC for FP exception enables */ -# define PR_FP_EXC_DIV 0x010000 /* floating point divide by zero */ -# define PR_FP_EXC_OVF 0x020000 /* floating point overflow */ -# define PR_FP_EXC_UND 0x040000 /* floating point underflow */ -# define PR_FP_EXC_RES 0x080000 /* floating point inexact result */ -# define PR_FP_EXC_INV 0x100000 /* floating point invalid operation */ +# define PR_FP_EXC_SW_ENABLE 0x80UL /* Use FPEXC for FP exception enables */ +# define PR_FP_EXC_DIV 0x010000UL /* floating point divide by zero */ +# define PR_FP_EXC_OVF 0x020000UL /* floating point overflow */ +# define PR_FP_EXC_UND 0x040000UL /* floating point underflow */ +# define PR_FP_EXC_RES 0x080000UL /* floating point inexact result */ +# define PR_FP_EXC_INV 0x100000UL /* floating point invalid operation */ # define PR_FP_EXC_DISABLED 0L /* FP exceptions disabled */ # define PR_FP_EXC_NONRECOV 1L /* async non-recoverable exc. mode */ # define PR_FP_EXC_ASYNC 2L /* async recoverable exception mode */ @@ -188,8 +188,8 @@ struct prctl_mm_map { #define PR_SET_FP_MODE 45 #define PR_GET_FP_MODE 46 -# define PR_FP_MODE_FR (1 << 0) /* 64b FP registers */ -# define PR_FP_MODE_FRE (1 << 1) /* 32b compatibility */ +# define PR_FP_MODE_FR (1UL << 0) /* 64b FP registers */ +# define PR_FP_MODE_FRE (1UL << 1) /* 32b compatibility */ /* Control the ambient capability set */ #define PR_CAP_AMBIENT 47 @@ -201,11 +201,11 @@ struct prctl_mm_map { /* arm64 Scalable Vector Extension controls */ /* Flag values must be kept in sync with ptrace NT_ARM_SVE interface */ #define PR_SVE_SET_VL 50 /* set task vector length */ -# define PR_SVE_SET_VL_ONEXEC (1 << 18) /* defer effect until exec */ +# define PR_SVE_SET_VL_ONEXEC (1UL << 18) /* defer effect until exec */ #define PR_SVE_GET_VL 51 /* get task vector length */ /* Bits common to PR_SVE_SET_VL and PR_SVE_GET_VL */ -# define PR_SVE_VL_LEN_MASK 0xffff -# define PR_SVE_VL_INHERIT (1 << 17) /* inherit across exec */ +# define PR_SVE_VL_LEN_MASK 0xffffUL +# define PR_SVE_VL_INHERIT (1UL << 17) /* inherit across exec */ /* Per task speculation control */ #define PR_GET_SPECULATION_CTRL 52 @@ -215,7 +215,7 @@ struct prctl_mm_map { # define PR_SPEC_INDIRECT_BRANCH 1L # define PR_SPEC_L1D_FLUSH 2L /* Return and control values for PR_SET/GET_SPECULATION_CTRL */ -# define PR_SPEC_NOT_AFFECTED 0 +# define PR_SPEC_NOT_AFFECTED 0UL # define PR_SPEC_PRCTL (1UL << 0) # define PR_SPEC_ENABLE (1UL << 1) # define PR_SPEC_DISABLE (1UL << 2) @@ -240,10 +240,10 @@ struct prctl_mm_map { # define PR_MTE_TCF_ASYNC (1UL << 2) # define PR_MTE_TCF_MASK (PR_MTE_TCF_SYNC | PR_MTE_TCF_ASYNC) /* MTE tag inclusion mask */ -# define PR_MTE_TAG_SHIFT 3 +# define PR_MTE_TAG_SHIFT 3UL # define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT) /* Unused; kept only for source compatibility */ -# define PR_MTE_TCF_SHIFT 1 +# define PR_MTE_TCF_SHIFT 1UL /* Control reclaim behavior when allocating memory */ #define PR_SET_IO_FLUSHER 57 @@ -275,11 +275,11 @@ struct prctl_mm_map { /* arm64 Scalable Matrix Extension controls */ /* Flag values must be in sync with SVE versions */ #define PR_SME_SET_VL 63 /* set task vector length */ -# define PR_SME_SET_VL_ONEXEC (1 << 18) /* defer effect until exec */ +# define PR_SME_SET_VL_ONEXEC (1UL << 18) /* defer effect until exec */ #define PR_SME_GET_VL 64 /* get task vector length */ /* Bits common to PR_SME_SET_VL and PR_SME_GET_VL */ -# define PR_SME_VL_LEN_MASK 0xffff -# define PR_SME_VL_INHERIT (1 << 17) /* inherit across exec */ +# define PR_SME_VL_LEN_MASK 0xffffUL +# define PR_SME_VL_INHERIT (1UL << 17) /* inherit across exec */ /* Memory deny write / execute */ #define PR_SET_MDWE 65 @@ -298,13 +298,13 @@ struct prctl_mm_map { #define PR_RISCV_V_SET_CONTROL 69 #define PR_RISCV_V_GET_CONTROL 70 -# define PR_RISCV_V_VSTATE_CTRL_DEFAULT 0 -# define PR_RISCV_V_VSTATE_CTRL_OFF 1 -# define PR_RISCV_V_VSTATE_CTRL_ON 2 -# define PR_RISCV_V_VSTATE_CTRL_INHERIT (1 << 4) -# define PR_RISCV_V_VSTATE_CTRL_CUR_MASK 0x3 -# define PR_RISCV_V_VSTATE_CTRL_NEXT_MASK 0xc -# define PR_RISCV_V_VSTATE_CTRL_MASK 0x1f +# define PR_RISCV_V_VSTATE_CTRL_DEFAULT 0UL +# define PR_RISCV_V_VSTATE_CTRL_OFF 1UL +# define PR_RISCV_V_VSTATE_CTRL_ON 2UL +# define PR_RISCV_V_VSTATE_CTRL_INHERIT (1UL << 4) +# define PR_RISCV_V_VSTATE_CTRL_CUR_MASK 0x3UL +# define PR_RISCV_V_VSTATE_CTRL_NEXT_MASK 0xcUL +# define PR_RISCV_V_VSTATE_CTRL_MASK 0x1fUL #define PR_RISCV_SET_ICACHE_FLUSH_CTX 71 # define PR_RISCV_CTX_SW_FENCEI_ON 0L @@ -321,11 +321,11 @@ struct prctl_mm_map { # define PR_PPC_DEXCR_SRAPD 2L /* Subroutine return address prediction disable */ # define PR_PPC_DEXCR_NPHIE 3L /* Non-privileged hash instruction enable */ /* Action to apply / return */ -# define PR_PPC_DEXCR_CTRL_EDITABLE 0x1 /* Aspect can be modified with PR_PPC_SET_DEXCR */ -# define PR_PPC_DEXCR_CTRL_SET 0x2 /* Set the aspect for this process */ -# define PR_PPC_DEXCR_CTRL_CLEAR 0x4 /* Clear the aspect for this process */ -# define PR_PPC_DEXCR_CTRL_SET_ONEXEC 0x8 /* Set the aspect on exec */ -# define PR_PPC_DEXCR_CTRL_CLEAR_ONEXEC 0x10 /* Clear the aspect on exec */ -# define PR_PPC_DEXCR_CTRL_MASK 0x1f +# define PR_PPC_DEXCR_CTRL_EDITABLE 0x1UL /* Aspect can be modified with PR_PPC_SET_DEXCR */ +# define PR_PPC_DEXCR_CTRL_SET 0x2UL /* Set the aspect for this process */ +# define PR_PPC_DEXCR_CTRL_CLEAR 0x4UL /* Clear the aspect for this process */ +# define PR_PPC_DEXCR_CTRL_SET_ONEXEC 0x8UL /* Set the aspect on exec */ +# define PR_PPC_DEXCR_CTRL_CLEAR_ONEXEC 0x10UL /* Clear the aspect on exec */ +# define PR_PPC_DEXCR_CTRL_MASK 0x1fUL #endif /* _LINUX_PRCTL_H */