/*
  Copyright (C) 2011 DJ Delorie <dj@redhat.com>

  This file is free software; you can redistribute it and/or modify it under
  the terms of the GNU General Public License as published by the Free
  Software Foundation; either version 2, or (at your option) any later
  version.

  This file is distributed in the hope that it will be useful, but WITHOUT ANY
  WARRANTY; without even the implied warranty of MERCHANTABILITY or
  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  for more details.

  You should have received a copy of the GNU General Public License
  along with this file; see the file COPYING3.  If not see
  <http://www.gnu.org/licenses/>.
*/

#include <stdint.h>
#include "cprintf.h"
#include "iodefine.h"
#include "sram.h"

/* This is for a 16 bit SRAM chip on CS7B */

void
sram_init (void)
{
  int i;

  SYSTEM.SYSCR0.WORD = 0x5A03;   /* enable the external bus...must also set key and internal ROME bit */
  IOPORT.PF3BUS.BYTE = 0x0F;     /* Enable A16-A19 */
  IOPORT.PF4BUS.BYTE = 0xFF;     /* Enable A0-A15 */
  IOPORT.PF5BUS.BYTE = 0x50;     /* Enable D8-D15, WR1/BC1 */

  /* We use CS7-B.  */
  IOPORT.PF0CSE.BIT.CS7E = 1;
  IOPORT.PF1CSS.BIT.CS7S = 1;

  /* CS3: native endian, 16-bit, enabled.  */
  BSC.CS7CR.WORD = 0x0001;

  BSC.CS7MOD.BIT.WRMOD = 1; /* single write strobe */
  BSC.CS7MOD.BIT.EWENB = 0; /* no external wait */
  BSC.CS7MOD.BIT.PRENB = 1; /* page read */
  BSC.CS7MOD.BIT.PWENB = 1; /* page write */
  BSC.CS7MOD.BIT.PRMOD = 1; /* page read access */

  /* wdoff <= cswoff */
  /* cson <= rdon <= csrwait */
  /* 1 <= wdon <= wron <= cswwait */
  /* cson <= wron <= cswwait */
  BSC.CS7WCR2.BIT.CSON = 0; /* CS assert wait (addr to cs) */

  BSC.CS7WCR1.BIT.CSRWAIT = 1; /* normal read cycle waits (addr to data valid) */
  BSC.CS7WCR1.BIT.CSPRWAIT = 1; /* page read cycle waits */
  BSC.CS7WCR2.BIT.RDON = 0; /* RD assert wait select (addr to RD on) */

  BSC.CS7WCR2.BIT.CSROFF = 0; /* read-access CS extension cycles (RD off to CS off) */
  BSC.CS7REC.BIT.RRCV = 0; /* read recovery cycles - CS off to different CS on */

  BSC.CS7WCR1.BIT.CSPWWAIT = 1; /* page write cycle waits */
  BSC.CS7WCR1.BIT.CSWWAIT = 1; /* normal write cycle waits */
  BSC.CS7WCR2.BIT.WDON = 0; /* write data output wait select */
  BSC.CS7WCR2.BIT.WRON = 1; /* WR assert wait select */

  BSC.CS7WCR2.BIT.CSWOFF = 1; /* write-access CS extension cycles */
  BSC.CS7WCR2.BIT.WDOFF = 1; /* write data output extension cycles */
  
  BSC.CS7REC.BIT.WRCV = 0; /* write recovery cycles */

  SYSTEM.BCKCR.BIT.BCLKDIV = 1;

#if 0
  sram_diagnostics ();
  {
    volatile unsigned long *p = (volatile unsigned long *) sram_base ();
    while (1)
      {
	p[0] = 0xff00aa55;
	(void)p[0];
	p[1] = 0xffffffff;
	(void)p[1];
	p[2] = 0x00000000;
	(void)p[2];
      }
  }
#endif
}

void *
sram_base (void)
{
  /* CS7 */
  return (void *) 0x01000000;
}

static unsigned long saved_sram_size = 0;

unsigned long
sram_size (void)
{
  volatile unsigned char *sram = (unsigned char *) sram_base ();
  volatile unsigned long *sram_l;
  unsigned long i;

  if (saved_sram_size == 0)
    {
      for (i = 16 * 1024 * 1024; i > 4; i >>= 1)
	{
	  sram_l =  (volatile unsigned long *) (sram + (i & 0x00ffffff));
	  *sram_l = i;
	}
      sram_l =  (volatile unsigned long *) sram;
      saved_sram_size = *sram_l;
    }
    return saved_sram_size;
}

/*--------------------------------------------------------------------------*/

static unsigned long long rand_next = 1;

static unsigned long
sd_rand(void)
{
  /* This multiplier was obtained from Knuth, D.E., "The Art of
     Computer Programming," Vol 2, Seminumerical Algorithms, Third
     Edition, Addison-Wesley, 1998, p. 106 (line 26) & p. 108 */
  rand_next = rand_next * 6364136223846793005LL + 1;
  /* was: next = next * 0x5deece66dLL + 11; */
  return (unsigned long)(rand_next >> 32);
}

static void
sd_srand(unsigned seed)
{
  rand_next = seed;
}


void
sram_diagnostics ()
{
  uint32_t *sp;
  int i, l;

  sp = sram_base ();
  l = sram_size () / sizeof (uint32_t);

  cprintf("sram diagnostics...\n");
  //  while (1)
    {
      rand_next = 1;
      for (i=0; i<l; i++)
	sp[i] = sd_rand ();

      rand_next = 1;
      for (i=0; i<l; i++)
	{
	  uint32_t x;
	  x = sd_rand ();
	  if (sp[i] != x)
	    cprintf("%l : %l vs %l\n", i * sizeof(uint32_t), sp[i], x);
	}

      for (i=0; i<l; i++)
	sp[i] = 0;

      rand_next = 1;
      for (i=0; i<l; i++)
	{
	  if (sp[i] != 0)
	    cprintf("%l : %l vs %l\n", i * sizeof(uint32_t), sp[i], 0);
	}

      for (i=0; i<l; i++)
	sp[i] = ~0;

      rand_next = 1;
      for (i=0; i<l; i++)
	{
	  if (sp[i] != ~0)
	    cprintf("%l : %l vs %l\n", i * sizeof(uint32_t), sp[i], ~0);
	}
    }
  for (i=0; i<l; i++)
    sp[i] = 0x11;
}