Date: Thu, 20 May 1999 05:43:54 +0200 To: pgcc AT delorie DOT com Subject: Re: K7 potentials Message-ID: <19990520054354.C15277@cerebro.laendle> Mail-Followup-To: pgcc AT delorie DOT com References: <374331C4 DOT CA20644C AT lycosmail DOT com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <374331C4.CA20644C@lycosmail.com>; from Adam Schrotenboer on Wed, May 19, 1999 at 05:48:52PM -0400 X-Operating-System: Linux version 2.2.7 (root AT cerebro) (gcc driver version pgcc-2.93.09 19990221 (gcc2 ss-980929 experimental) executing gcc version 2.7.2.3) From: Marc Lehmann Reply-To: pgcc AT delorie DOT com X-Mailing-List: pgcc AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk On Wed, May 19, 1999 at 05:48:52PM -0400, Adam Schrotenboer wrote: > Will the K7 be less "register starved" than the rest of the x86 > archictecture, or was this simply not possible while maintaining x86 > compatibility???? It is possible, the solution is named register renaming (a partial solution, that is). Personally, I think the many cache miss buffers (20 or 32, I forgot) the K7 is assumed to have will make another difference. > If it will have more registers, how much difference will this make > performance or optimization-wise?? It will, but they won't be user-visible, and the chip is supposed to use them automatically. I don't know wether the K7 actually extends the register set (like the P-III does), but I hope they do it in a sane way! > Will this be a EGCS thing, or will it be more likely PGCC?? Both. EGCS will certainly add scheduling for the k7. Things like the katmai instructions, however, will be a pgcc-only thing for some time. I might decide to drop mmx support in favour of them ;) > Anybody know when K7's will be available at a decent price (yes, decent price??? -- -----==- | ----==-- _ | ---==---(_)__ __ ____ __ Marc Lehmann +-- --==---/ / _ \/ // /\ \/ / pcg AT goof DOT com |e| -=====/_/_//_/\_,_/ /_/\_\ XX11-RIPE --+ The choice of a GNU generation | |