Message-ID: <374331C4.CA20644C@lycosmail.com>
Date: Wed, 19 May 1999 17:48:52 -0400
From: Adam Schrotenboer <ajschrotenboer AT lycosmail DOT com>
X-Mailer: Mozilla 4.51 [en] (Win98; U)
X-Accept-Language: en
MIME-Version: 1.0
To: pgcc AT delorie DOT com
Subject: K7 potentials
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Reply-To: pgcc AT delorie DOT com

I was wondering if there is any speculation, q's, etc about what the K7
may be capable of.

For example:
    Will the K7 be less "register starved" than the rest of the x86
archictecture, or was this simply not possible while maintaining x86
compatibility????
    If it will have more registers, how much difference will this make
performance or optimization-wise??
    Will this be a EGCS thing, or will it be more likely PGCC??
    Anybody know when K7's will be available at a decent price (yes,
this is probably near to impossible to determine, but it could make an
interesting point for discussion.)
    Anything more that is AMD &| K7 related.

I'm assuming that a different scheduler will be used, either that or the
Haifa sched w/ full processor specs.

Anyway, I'm bringing this up due to the (hopefully) soon release of the
AMD K7 in June or July (I hope so, really I do)