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23 Jan 1998 19:58:54 -0500 (EST)
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From: Scott Lampert <fortunato AT heavymetal DOT org>
To: Ronald Wahl <Ronald DOT Wahl AT Informatik DOT TU-Chemnitz DOT DE>
Subject: Re: Status of AMD K6 Support
Cc: beastium-list AT Desk DOT nl, Steve Bergman <steve AT netplus DOT net>
Sender: Marc Lehmann <pcg AT goof DOT com>
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On 23-Jan-98 Ronald Wahl wrote:
> Try -funroll-loops or -funroll-all-loops. This may give a speedup or a
> slowdown. Maybe you should also check the latest snapshots. But note:
> The
> code generated by this two options is still broken in some cases. What
> you
> also could try is to optimize the assembler routines in Mesa. Try to
> minimize the fpu instructions (e.g. remove the fxch instructions and
> adapt the code) and use integer code in parallel with fpu code. Further
> more recommendations you will find in the optimization guide that is
> located here: http://www.amd.com/K6/k6docs.

        From what I understand something on the order of 95% of the
strength-reduction optimizations are currently disabled due to some bugs
in all current versions of egcs.  Without the strength reductions
unroll-loops/unroll-all-loops are more likely to generate slower code and
in practice this seems to be the case.
 
> ... but the best optimization you will get with a 3D accelerator by 3dfx
> since these chips are supported by Mesa.

        This is true by far, however 3dfx uses the main CPU for all
triangle setups so optimizing floating point operations can give an even
larger increase in performance, hence the much better performance of 3dfx
with a Pentium or AMD as opposed to a Cyrix.
                -Scott

---
Scott Lampert             | Home Page: http://www.heavymetal.org
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