X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com Message-ID: <556C650B.1080104@lsol.ru> Date: Mon, 01 Jun 2015 16:58:35 +0300 From: "Maxim Feoktistov (max AT lsol DOT ru)" User-Agent: Mozilla/5.0 (X11; Linux i686; rv:24.0) Gecko/20100101 Thunderbird/24.4.0 MIME-Version: 1.0 To: geda-user AT delorie DOT com Subject: Re: [geda-user] Different DRC for internal and external layers References: <556A523B DOT 10309 AT lsol DOT ru> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Reply-To: geda-user AT delorie DOT com On 05/31/2015 04:41 PM, Kai-Martin Knaak wrote: > Maxim Feoktistov (max AT lsol DOT ru) wrote: > >> To prepare the board I has been change source of gEDA PCB, add the >> possibility to direct different minimal copper width and space for >> internal and external layers and use it for DRC check. >> May be this patch will helpfull to someone else? >> > The patch would have been useful for me when I designed a high current > board. The board had extra thick inner copper layers for which the > manufacturer required increased minimum distance. Unfortunately, I had > my layout almost done when I got aware of this. Just setting the DRC > to the more stringent mid layer constraints did of course swamp the > output with messages related to top and bottom. > > I worked around the problem by copy pasting the mid layer to a > separate empty layout, do DRC there and paste back. First time I tried the same, but also I coped all vies (because the space between line and via must be check) and also I need to copy the components with pins, but not to copy component with pad because the space between pad and via on bottom layer may be 0.1mm, (the space between BGA pad and nearest via under BGA always 0.1mm) and separate the elements that must be copied and that must not, it is task... -- Best regards, Maxim Feoktistov