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From: "John Luciani (jluciani AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
Date: Mon, 5 Feb 2024 14:05:58 -0500
Message-ID: <CA+qhd=-oWHQTitmkLuZJ9NYEYb4GemXt-893phKgrvKMORgF+w@mail.gmail.com>
Subject: Re: [geda-user] Solder mask commands?
To: geda-user AT delorie DOT com
Content-Type: multipart/alternative; boundary="00000000000099f4080610a7277a"
Reply-To: geda-user AT delorie DOT com

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I have never been asked to set soldermask oversize to zero.
This seems to me like a design decision that the PCB designer
should be making based on component specifications and process
capabilities. I would expect the PCB manufacturer to perform a DRC
against their process capabilities and report violations to the PCB designe=
r
for correction.

Most of my footprints I do are in the 4 - 5mil oversize. However, with a
lot of
the newer QFN and BGA parts I need to go to 2 - 3mil.

John L

On Mon, Feb 5, 2024 at 6:11=E2=80=AFAM Richard Rasker (rasker AT linetec DOT nl) [=
via
geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:

> I submitted the modified board, and all is well now -- but I still got
> into a bit of a discussion about this solder mask oversize/expansion thin=
g.
>
> I remarked that this was the first time in many decades that I was asked
> to set the solder mask oversize to zero, however the person from the PCB
> house said that zero oversize has been the industry standard for at
> least 20 years, ever since the lithographic workflow wasn't exclusively
> based on photographic films any more. But when I look up best design
> practices for various PCB design packages and other sources, I still see
> a small (usually 4 mil) expansion size mentioned.
>
> So what is it? Would it be a good idea to henceforth use zero oversize
> solder masks? What do people around here do?
>
> Thanks for any thoughts.
>
> Richard
>
>

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<div dir=3D"ltr"><div>I have never been asked to set soldermask oversize to=
 zero. <br></div><div>This seems to me like a design decision that the PCB =
designer</div><div>should be making based on component specifications and p=
rocess</div><div>capabilities. I would expect the PCB manufacturer to perfo=
rm a DRC</div><div>against their process capabilities and report violations=
 to the PCB designer</div><div>for correction.<br></div><div><br></div><div=
>Most of my footprints I do are in the 4 - 5mil oversize. However, with a l=
ot of <br></div><div>the newer QFN and BGA parts I need to go to 2 - 3mil. =
<br></div><div><br></div><div>John L<br></div></div><br><div class=3D"gmail=
_quote"><div dir=3D"ltr" class=3D"gmail_attr">On Mon, Feb 5, 2024 at 6:11=
=E2=80=AFAM Richard Rasker (<a href=3D"mailto:rasker AT linetec DOT nl">rasker AT lin=
etec.nl</a>) [via <a href=3D"mailto:geda-user AT delorie DOT com">geda-user AT delori=
e.com</a>] &lt;<a href=3D"mailto:geda-user AT delorie DOT com">geda-user AT delorie DOT c=
om</a>&gt; wrote:<br></div><blockquote class=3D"gmail_quote" style=3D"margi=
n:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex=
">I submitted the modified board, and all is well now -- but I still got <b=
r>
into a bit of a discussion about this solder mask oversize/expansion thing.=
<br>
<br>
I remarked that this was the first time in many decades that I was asked <b=
r>
to set the solder mask oversize to zero, however the person from the PCB <b=
r>
house said that zero oversize has been the industry standard for at <br>
least 20 years, ever since the lithographic workflow wasn&#39;t exclusively=
 <br>
based on photographic films any more. But when I look up best design <br>
practices for various PCB design packages and other sources, I still see <b=
r>
a small (usually 4 mil) expansion size mentioned.<br>
<br>
So what is it? Would it be a good idea to henceforth use zero oversize <br>
solder masks? What do people around here do?<br>
<br>
Thanks for any thoughts.<br>
<br>
Richard<br>
<br>
</blockquote></div>

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