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From: "karl AT aspodata DOT se [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To: geda-user AT delorie DOT com
Subject: Re: [geda-user] PCB silk layer image script
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References: <6877754c-dcb7-db34-dd39-419de060ad7a AT linetec DOT nl> <20231001134334 DOT D3643862293F AT turkos DOT aspodata DOT se> <f8294789-b9a1-9183-58f1-ea951b5c7181 AT linetec DOT nl>
Comments: In-reply-to "Richard Rasker (rasker AT linetec DOT nl) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
   message dated "Sun, 01 Oct 2023 16:42:52 +0200."
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Date: Sun,  1 Oct 2023 21:13:07 +0200 (CEST)
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Precedence: bulk

Richard Rasker:
...
> Where is this default size stored anyway? Or is it hard-coded into pcb?

pstoedit-3.74.tar.gz is available at sourceforge.
In its src dir there are:

$ ls -1 *pcb*.{cpp,h}
drvpcb1.cpp
drvpcb1.h
drvpcb2.cpp
drvpcb2.h
drvpcbfill.cpp
drvpcbfill.h
$

 You are using the pcbfill one:
$ tail -1 ~/pcbsilk 
pstoedit -q -f "pcbfill" -ssp $silkname.eps $silkname.pcb
$

 And as you can see, the board size is hardcoded in that pstoedit 
 plugin:

$ grep -B 4 -A 4 initializations drvpcbfill.cpp 
drvPCBFILL::derivedConstructor(drvPCBFILL):
//(const char * driveroptions_p,ostream & theoutStream,ostream & theerrStream):
constructBase
{
// driver specific initializations
  outf << "PCB[\"\" 600000 500000]\n\n";
  outf << "Grid[2000.00000000 0 0 0]\n\n";
  outf << "Layer(10 \"silk\")\n(\n";
}
$

Perhaps the pcb plugin handles the board size better.

> > I can help with a program doing that if you wish.
> 
> That would be nice, although I should of course try and figure it out 
> for myself first. I see that the resulting PCB file features large 
> polygons, so if changing the size beforehand is not possible, I'd say 
> the logical approach would be to find the lowest Y value (the topmost 
> polygon point), and subtract this value from all Y values - although 
> this is not something that I like to do in a bash script.
...

In https://aspodata.se/git/openhw/bin/, I have Common.pm, Pcb.pm and 
Pcb_test.pl. I'm currently testing how to get min/max x and y for
different pcb things:

$ Pcb_test.pl bb styrkort.pcb
 via: 8.5000mm 10.0000mm 151.0000mm 222.5000mm
 line: 5.8700mm 3.0000mm 154.1300mm 237.0000mm
$ Pcb_test.pl polygon styrkort.pcb
Layer 1, name top:
        5.7500mm 3.0000mm 154.0000mm 237.0000mm
Layer 2, name bottom:
        5.7500mm 3.0000mm 154.0000mm 237.0000mm
Layer 3, name outline:
Layer 4, name bottom silk:
Layer 5, name top silk:
$

Regards,
/Karl Hammar