X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-Virus-Scanned: Debian amavisd-new at mail.linetec.nl Message-ID: <407d4f7a-f529-b0bd-de4f-39fd357cb7c0@linetec.nl> Date: Thu, 9 Mar 2023 12:07:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [geda-user] Connecting pads directly to polygons Content-Language: nl-NL, en-US To: geda-user AT delorie DOT com References: <0350ae12-d97f-3fc0-f146-c83066c0e695 AT linetec DOT nl> <48f8fe1f-b377-be59-6493-5d61140fdc13 AT linetec DOT nl> From: "Richard Rasker (rasker AT linetec DOT nl) [via geda-user AT delorie DOT com]" In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk Op 06-03-2023 om 18:30 schreef Stephan Böttcher (geda AT psjt DOT org) [via geda-user AT delorie DOT com]: > Moin, > > "Richard Rasker (rasker AT linetec DOT nl) [via geda-user AT delorie DOT com]" > writes: > >> - Short circuits are currently not flagged by DRC, but only by >> pressing 'O' (optimizing rat's nest) -- while I'd say that an >> unintended short is certainly a design rule violation. I have in >> fact been bitten by this arguably Very Bad error, when I made some >> last-minute changes, performed a DRC, but forgot to also check with >> 'O'. > No. An unintended short in the drawing is not a DRC violation. Testing > the connectivity is not DRC. A DRC check is independent of the desired > connectivity. DRC checks if the manufacturer can reliably implement the > layout with the same connectivity as drawn. Yes, that makes sense. > Flagging zero clearance of a pad as a DRC error is wrong, even if the connection is undesired. Not to put too fine a point on it, but flagging zero clearance is the current DRC behavior. > I personally prefer if the DRC check tool does pure DRC checks and not mix in > connectivity checks. You may well disagree. I'm mostly looking at things from a practical point of view. I quite often need SMD pads to be fully embedded in copper, but there appears to be no convenient way to accomplish this like with through-hole (the third thermal option). The past few days, I was reworking the old design that triggered this issue. I tried the 'promiscuous extra polygon' method (i.e. selecting the spare layer, drawing a polygon to connect the pad to the surrounding polygon, using S to toggle the PolyClear flag, and then M(ove) it to the desired layer), but that just causes lots of new real and potential problems (adjusting the polygon, avoiding new DRC erros and shorts etc.), especially when moving or rotating the component. Drawing thick lines and Join these to both the surrounding polygon and the pad were just as bad. In summary, I find that polygons and lines with zero clearance are way more troublesome than pads with zero clearance, which I think makes sense: the component's pads are the focus of the direct connection, not any polygons or lines that are separate from that component, and are only used as a sort of patch. Also, pads clearly stand out in the design, but those 'promiscuous' polygons and lines are completely invisible as soon as they're integrated in a layer, and more or less lie lurking to cause trouble when making changes at a later time. So even though it may not be the approved method and triggers oodles of DRC errors, I still use the solution with zero clearance for pads -- as I find that this is by far the cleanest (at least from my perspective) and most convenient method. This is also because surrounding pins and lines are automatically cleared with their defined, DRC-compliant clearance. This way, I get maximum connectivity on the desired pads combined with maximum surrounding copper fill, without any hassle or new errors. The only drawback is having to wade through a long list of Insufficient (read: zero) Clearance DRC errors to see if there are any other, genuine DRC issues, but that is far less problematic. Anyway, thanks for all your thoughts on this, Regards, Richard