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From: "karl AT aspodata DOT se [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To: geda-user AT delorie DOT com
Subject: Re: [geda-user] [OT] Solder paste woes
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Comments: In-reply-to "Gabriel Paubert (paubert AT iram DOT es) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
   message dated "Wed, 17 Aug 2022 23:29:29 +0200."
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Date: Thu, 18 Aug 2022 11:58:38 +0200 (CEST)
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Gabriel Paubert:
...
> Definitely, these ones need 65-70% area coverage from my experience,
> anything above 80% is a disaster. And this is with QFN with quite a few
> PTH for thermal dissipation on the internal layers or other side (with
> solder mask removed on the other side also).
...

For more info on QFN, see;
 www.jedec.org JEP95 MO-220K01.pdf
 www.jedec.org JEP95 MO-229F.pdf
 https://www.nxp.com/docs/en/application-note/AN1902.pdf
 https://www.custommmic.com/resources/custom-mmic-app-note-105.pdf
 ti.com scba017d.pdf
 ti.com sloa122.pdf
 cypress.com 001-72845_AN72845_Design_Guidelines_For_Cypress_Quad_Flat_No_Lead_QFN_Packaged_Devices.pdf

I don't have theese but they seems related:
 IPC-7525 Stencil Design Guidelines
 IPC-7351 Generic Requirements for Surface Mount Design and Land Pattern Standard
 IPC-7093 Design and Assembly Process Implementation for Bottom Termination Components

Regards,
/Karl Hammar