X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=to:subject:message-id:date:from:in-reply-to:references:mime-version :from:to:cc; bh=BBbR6Emc53sZvpndeOiNiZR5++2p4Eiz/2E8MHjcSIE=; b=mG1C3s9mMnNhX6f6T0FhLTU88aexxVXIdpMR7jr6KTweY20dL9mEb9COdwKIWZQTuZ jO9ccljMQkTAVRAQsafJtKf7VUkUGT47W9DExuCvxDqT+rgsl9x584wvsVOF+tkAHBi/ b+RGa30ulnd+Bc44URxJZ+ZhYHdnUoCrsf1p1KIz/s5aCn33EfpQPR7jG4NzM5soLhwl c1J7/o0Y3PvYjvIlXgX2MgwwtCUQ3P8rntWWhAqlZYR4VWSSKZBRXHhUwN5KIP7Yfkty Xa+L54IDizKHZAAEV0Lk/xKIl+U4LtFMDKwwFmMx0eSF+jII9lhZcR2CEw0tCyghZrCe HuTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=to:subject:message-id:date:from:in-reply-to:references:mime-version :x-gm-message-state:from:to:cc; bh=BBbR6Emc53sZvpndeOiNiZR5++2p4Eiz/2E8MHjcSIE=; b=mlfq7jBURGD39sSLLxGIFifSkZQlFLpKd2eX83l0ev4RJ9aUp1t3wKcEmGEw75lP0c f3GN1TB/okT/xIvm7DfyodlMf0EnHZThGwl8rMViK5+mF0bHy2c64DIQGEu6k5ls1Q+m XsLrwVCOuYpO3ACy8njp3KxiuJXrloMK4OzH7UnAsPXL44TfneKJUtDY8lI4wuLyMZj9 Ax3OnM0YecSoLpfw80nwQXk8HzTD2CXjNN5be26yrHHkm68LZXXfgWZQS2b+vo6Cltbi RiO9fR12NG0RX30qqgL9D+J35+Jeqv3ZuoZCsKwgEqEWEoJqnqEk5fWOXg8k0JmWMRYK 2PEQ== X-Gm-Message-State: ACgBeo1EwqgNQ6jpM3FU1MpowWSHfjysFt0sdB0Jq1MvE8Nxc0IVnFFD g0A9igXR5vs0UG2qXW1zYvsZYFVeWubVD7WLLLzDDgnpTXs= X-Google-Smtp-Source: AA6agR48m/z8D+p0mcy2qAYuNDfeO72ChOIVfgcXi5q1SD6xMrWN8QaRVE90NzzJJgJ1VAHIyl2IosGASCvXZUEBRIE= X-Received: by 2002:a67:e195:0:b0:37f:d765:b7db with SMTP id e21-20020a67e195000000b0037fd765b7dbmr10847612vsl.10.1660750269559; Wed, 17 Aug 2022 08:31:09 -0700 (PDT) MIME-Version: 1.0 References: <66c88bcb-820c-9a1d-1698-d0b36f32e3f3 AT linetec DOT nl> In-Reply-To: From: "John Luciani (jluciani AT gmail DOT com) [via geda-user AT delorie DOT com]" Date: Wed, 17 Aug 2022 11:30:58 -0400 Message-ID: Subject: Re: [geda-user] [OT] Solder paste woes To: geda-user AT delorie DOT com Content-Type: multipart/alternative; boundary="000000000000e0b77305e6718d1f" Reply-To: geda-user AT delorie DOT com --000000000000e0b77305e6718d1f Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable I do the following - * ENIG finish * 4mil ss stencil with trapezoidal apertures * 0.062 FR4 or aluminum scrap for a squeegee * Chipquick (T4 particle size) or Syntech solder paste * 0.128" alignment holes in the stencil and pcb. I place these outside the board area. I use 1/8" ss dowels for alignment. * stencil footprints for all the small form-factor components. These footprints have slightly smaller pads. For thermal pads the coverage is between 40 - 60% Also, when screening the boards I do not keep the solder paste open for too long. Typically 30minutes but no more than 60 minutes. John L On Wed, Aug 17, 2022 at 9:36 AM Erich Heinzle (a1039181 AT gmail DOT com) [via geda-user AT delorie DOT com] wrote: > Two thoughts > > 1) I have heard of many people doing reflow at home who use locating pins > on a precisely drilled support block that positively locates the pcb itse= lf > and the overlying stencil with matching holes when applying the paste > > 2) It could be that your apertures in the stencil are not optimal. Smalle= r > apertures may allow more precise results. IIRC gEDA PCB solder mask > aperture shrinkage relative to the pad shape can only be defined, if at > all, on a whole board basis. > > pcb-rnd treats each pad as a padstack, where layer apertures on each > layer can be defined individually, or autogenerated, in the :padstackedi= t > action. > > Identical pads, i. e. in a QFN, can use the same padstack prototype for > all the pads, once defined. This gives you very granular control, down = to > the individual padstack if required. Slots and arbitrary simple polygonal > pad shapes are also supported in padstacks. > > How are you generating your gerbers for the stencil? > > > Regards, > > Erich > > > On Wed, 17 Aug 2022 21:23 Richard Rasker (rasker AT linetec DOT nl) [via > geda-user AT delorie DOT com], wrote: > >> Hello, >> >> My apologies for this off-topic question, as this has not much to do >> with gEDA - but I could do with some expert advice on PCB assembly for >> reflow, and perhaps some people here have good ideas. >> >> I've been working with SMD reflow technology for many years now, and >> very step of the process goes smooth except one: applying solder paste >> for small-pitch components. >> >> My main problem is that even after hundreds of PCB's, the result is >> unpredictable. Only 2 out of every 10 PCB's have a good crisp result, >> like this: http://www.linetec.nl/electronics/paste_crisp.jpg >> >> The other PCB's often look like this: >> http://www.linetec.nl/electronics/paste_mess.jpg >> >> So applying paste is rather a hit-and-miss affair, and it sometimes >> takes half a dozen attempts to get one PCB right. >> >> This is my set-up and work procedure: >> >> * I only use flash gold finished PCB's (the tinned ones have bumpy pads, >> hugely increasing the error rate). >> * For positioning of the PCB's, I use an L-shaped piece of PCB taped >> down with masking tape. >> * The SMD stencil is stainless steel, 100 microns thick, taped into >> position along the bottom edge and at a top corner. >> * The wiper is also stainless steel, but of course rather thicker. >> * I apply the paste slowly with the wiper at an angle of ~30=C2=B0 relat= ive >> to the horizontal, with small sideways movements in addition to the main >> movement downwards. >> * I use moderate force -- difficult to estimate, but I'd say between 500 >> and 800 grams, so roughly 1 - 1.5 pounds. >> * After each single paste application, I wipe the underside of the >> stencil with an acetone cloth, to prevent any paste on the underside >> getting squished, causing shorts etcetera. >> >> Now admittedly, those 'shorted' pads often turn out OK due to the >> solder's high surface tension and tendency to collect at the metal parts >> of the components, but I still get rather a lot (ca. 1 in 5) of PCB's >> with nasty shorts, especially underneath those QFN housings. >> >> There is of course also the problem of the solder paste degrading and >> getting tougher and 'dryer' over time; however, that is not the problem >> here. If anything, fresh solder paste is more runny and thus tends to >> short out between pads faster. >> >> So the question is if someone has any tips to improve the process, or >> maybe point out what I'm doing wrong. (Yes, of course I can have a PCB >> house do the assembly, but that typically costs > $1000 per run, and >> that is not always an option.) >> >> Thanks in advance, >> >> Richard >> >> --000000000000e0b77305e6718d1f Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
I do the following -

= =C2=A0 * ENIG finish
=C2=A0 * 4mil ss stencil with trapezoidal ap= ertures
=C2=A0 * 0.062 FR4 or aluminum scrap for a squeegee
=C2=A0 * Chipquick (T4 particle size) or Syntech solder paste
=C2=A0 * 0.128" alignment holes in the stencil and pcb.
=C2=A0=C2=A0=C2=A0=C2=A0 I place these outside the board area.
=
=C2=A0=C2=A0=C2=A0=C2=A0 I use 1/8" ss dowels for alignment.
<= /div>
=C2=A0 * stencil footprints for all the small form-fac= tor components.
=C2=A0=C2=A0=C2=A0 These footprints have slightly= smaller pads. For thermal
=C2=A0=C2=A0=C2=A0 pads the coverage i= s between 40 - 60%

Also, when screening the boards= I do not keep the solder paste open
for too long. Typically 30mi= nutes but no more than 60 minutes.

John L
=


On Wed, Aug 17, 2022 at 9:36 AM Erich Heinzle (a1039181 AT gmail DOT com) [via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
Two thou= ghts

1) I have heard of = many people doing reflow at home who use locating pins on a precisely drill= ed support block that positively locates the pcb itself and the overlying s= tencil with matching holes when applying the paste
<= br>
2) It could be that your apertures in the stenci= l are not optimal. Smaller apertures may allow more precise results. IIRC g= EDA PCB solder mask aperture shrinkage relative to the pad shape can only b= e defined, if at all,=C2=A0 on a whole board basis.=C2=A0

pcb-rnd treats each pad as a padstack,=C2= =A0 where layer apertures on each layer can be defined individually,=C2=A0 = or autogenerated, in the :padstackedit action.

<= /div>
Identical pads, i. e. in a QFN,=C2=A0 can use the sa= me padstack prototype for all the pads,=C2=A0 once defined. This gives you = very granular control,=C2=A0 down to the individual padstack if required. S= lots and arbitrary simple polygonal pad shapes are also supported in padsta= cks.

How are you generat= ing your gerbers for the stencil?=C2=A0


Regards,=C2=A0

Erich


On Wed, 17 Aug 2022 = 21:23 Richard Rasker (rasker AT linetec DOT nl) [via geda-user AT delorie DOT com], <geda-user AT delorie DOT com> wrote:
Hello,

My apologies for this off-topic question, as this has not much to do
with gEDA - but I could do with some expert advice on PCB assembly for
reflow, and perhaps some people here have good ideas.

I've been working with SMD reflow technology for many years now, and very step of the process goes smooth except one: applying solder paste
for small-pitch components.

My main problem is that even after hundreds of PCB's, the result is unpredictable. Only 2 out of every 10 PCB's have a good crisp result, <= br> like this: http://www.linetec.nl/electro= nics/paste_crisp.jpg

The other PCB's often look like this:
http://www.linetec.nl/electronics/paste_m= ess.jpg

So applying paste is rather a hit-and-miss affair, and it sometimes
takes half a dozen attempts to get one PCB right.

This is my set-up and work procedure:

* I only use flash gold finished PCB's (the tinned ones have bumpy pads= ,
hugely increasing the error rate).
* For positioning of the PCB's, I use an L-shaped piece of PCB taped down with masking tape.
* The SMD stencil is stainless steel, 100 microns thick, taped into
position along the bottom edge and at a top corner.
* The wiper is also stainless steel, but of course rather thicker.
* I apply the paste slowly with the wiper at an angle of ~30=C2=B0 relative=
to the horizontal, with small sideways movements in addition to the main movement downwards.
* I use moderate force -- difficult to estimate, but I'd say between 50= 0
and 800 grams, so roughly 1 - 1.5 pounds.
* After each single paste application, I wipe the underside of the
stencil with an acetone cloth, to prevent any paste on the underside
getting squished, causing shorts etcetera.

Now admittedly, those 'shorted' pads often turn out OK due to the <= br> solder's high surface tension and tendency to collect at the metal part= s
of the components, but I still get rather a lot (ca. 1 in 5) of PCB's <= br> with nasty shorts, especially underneath those QFN housings.

There is of course also the problem of the solder paste degrading and
getting tougher and 'dryer' over time; however, that is not the pro= blem
here. If anything, fresh solder paste is more runny and thus tends to
short out between pads faster.

So the question is if someone has any tips to improve the process, or
maybe point out what I'm doing wrong. (Yes, of course I can have a PCB =
house do the assembly, but that typically costs > $1000 per run, and that is not always an option.)

Thanks in advance,

Richard

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