X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-Virus-Scanned: Debian amavisd-new at mail.linetec.nl Subject: Re: [geda-user] PCB, 2 parts physically in the same place To: geda-user AT delorie DOT com References: From: "Richard Rasker (rasker AT linetec DOT nl) [via geda-user AT delorie DOT com]" Message-ID: <5ba24d79-87b2-c783-2bb9-a562d8dc4d73@linetec.nl> Date: Sun, 25 Oct 2020 23:27:21 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk Hello Gene, Op 25-10-20 om 02:04 schreef gene glick (geneglick AT optonline DOT net) [via geda-user AT delorie DOT com]: > I want to do this on purpose. One part, a 2X16 character display has > 10 connections to the PCB. Problem is, they are just holes. It is > meant to have a 10 pin header on the PCB, and then the display gets > positioned over the header and soldered in place. So I placed a 10-pin > header in the same location that the display holes. They line up > perfectly but the sizes are slightly different (a little more or less > annulus for example). > > I could simply get rid of the 10-pin header (yeah, I think that's the > way to go in the short term), and remember to order it. If it's in the > schematic though, it gets into the BOM...which is good. I'm not certain if I completely understand, but here are my thoughts. First off, I adopted the habit of creating PCB footprints and associated gschem symbols for each and and every non-standard-dimenioned component I use. This also goes for character displays, regardless of the fact that the actual PCB connections are often made by single-row 0.1" pitch headers. This has several advantages over using just a matching header footprint, the most important of which is that PCB always shows the full area taken up by the display, with any mounting holes in the right place as well, so they can be avoided when routing. The only drawback is that the schematic and the bom will list the display itself, but not the header needed to connect it to the PCB. As Chad mentioned already, it should be no problem to have two or more different parts physically in the same place, but with one major caveat: holes are not allowed to overlap or be positioned too close to each other (but the annuli around two holes may overlap). > Anyway, PCB doesn't allow a couple of things - I cannot make a thermal > connection to the plane on either top or bottom of board. Instead, I > made some traces to the plane. Now DRC reports a problem with too > little overlap. This should not be a problem. The Thermal tool should only make a thermal connection from a solder hole to a surrounding plane on the selected layer. And oh, keeping the Shift key depressed while clicking the Thermal tool will cycle through several thermal styles. Maybe there is a problem with your layer definitions? I once made the rookie mistake of defining two layers labeled 'top' and 'bottom' on the same side of the board, with all sorts of, erm, 'interesting' results when I tried keeping connections to copper planes apart. Best regards, Richard Rasker