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Date: Sun, 15 Sep 2019 09:07:33 +0200
From: "Bert Timmerman (bert DOT timmerman AT xs4all DOT nl) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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To: geda-user AT delorie DOT com
Subject: Re: [geda-user] blind vias, gerbers and gerbv
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Reply-To: geda-user AT delorie DOT com

Bert Timmerman (bert DOT timmerman AT xs4all DOT nl) [via geda-user AT delorie DOT com] 
wrote:
> Bert Timmerman (bert DOT timmerman AT xs4all DOT nl) [via geda-user AT delorie DOT com] 
> wrote:
>> Britton Kerin (britton DOT kerin AT gmail DOT com) [via geda-user AT delorie DOT com] 
>> wrote:
>>> I'm just trying my first pcb board with blind vias.  The rendering in
>>> pcb is great.
>>>
>>> The produced gerbers look like they're probably right, but when I use
>>> gerb the only place I can actually see anything related to the buried
>>> vias is in the board_name.fab.gbr file, and the view of it doesn't
>>> show anything about from/to layers.  The board_name.top.gbr and
>>> board_name.bottom.gbr files contain many lines like for example:
>>>
>>> X434601Y487516D01*
>>> X434765Y487324D01*
>>> X434957Y487160D01*
>>>
>>> which look like they represent the buried vias and their destination
>>> layer (D01 part), but they don't show up under gerbv
>>> boad_name.top.gbr.
>>>
>>> I would assume this was just a gerbv problem except that my fab just
>>> tried to change my board from their Blind/buries vias type to their
>>> through-hole type, so it looks like maybe they aren't seeing the
>>> buried vias either.
>>>
>>> Am I missing something about BB vias, or might there be some real
>>> problem with the gerbers?
>>>
>>> Thanks,
>>> Britton
>>>
>> Hi Britton,
>>
>> AFAIK, you're the first user trying to get a board with bbvias to a fab.
>>
>> I will try to look into this this evening/tonight (UTC+2), and this 
>> Sunday.
>>
>> I did some visual verification on gerbers and other generated files 
>> when this feature went into pcb, recollection of all the details 
>> fails me at the moment.
>>
>> I did do a layout with bbvias, but never send it to a fab house.
>>
>> There are some small quirks in pcb, like the png exporter showing 
>> pins on the bottom layer, when they are not present at that layer 
>> (LP1746103).
>>
>> Connectivity and DRC (FWIW) was ok though.
>>
>> Could you send some gerbers (or parts thereof) as to verify these are 
>> correct or not.
>>
>> Kind regards,
>>
>> Bert Timmerman.
>>
> Hi Britton,
>
> I made the minimal test.pcb of a handful of traces on various layers 
> and two bbvias.
>
> The gerber files for copper, soldermask, silkscreen and outline should 
> not differ from a pcb with through hole vias.
>
> I get the following drill files for connecting the copper layers with 
> bbvias:
>
> test.plated-drill.cnc
> test.plated-drill_01-02.cnc
> test.plated-drill_03-06.cnc
>
> Can you try this and see if you get similar drill files ?
>
> Kind regards,
>
> Bert Timmerman.
>
Oh, and before I forget: please check the stacking order in your pcb 
file or with "File/Preferences.../Layer/Groups" and communicate stack up 
with fab house, you have to tell them what gerber files belong with 
layers 01, 02, 03 and 06 and where they live in the lasagna ;-)