X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com Date: Wed, 30 Jan 2019 21:12:19 +0100 (CET) X-X-Sender: igor2 AT igor2priv To: geda-user AT delorie DOT com X-Debug: to=geda-user AT delorie DOT com from="gedau AT igor2 DOT repo DOT hu" From: gedau AT igor2 DOT repo DOT hu Subject: Re: [geda-user] Refdes bug or Master Attribute Document on the Wiki needs update. In-Reply-To: Message-ID: References: <9ed059c0-f3c5-1482-169b-f8f1119f3208 AT fastmail DOT com> <5BC4365D-FBD0-4495-806B-C30BA710D31B AT noqsi DOT com> <4739A346-6DB4-4250-965C-13AA19863969 AT noqsi DOT com> User-Agent: Alpine 2.00 (DEB 1167 2008-08-23) MIME-Version: 1.0 Content-Type: MULTIPART/MIXED; BOUNDARY="0-397992029-1548879139=:21900" Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --0-397992029-1548879139=:21900 Content-Type: TEXT/PLAIN; charset=UTF-8 Content-Transfer-Encoding: QUOTED-PRINTABLE On Wed, 30 Jan 2019, John Doty wrote: > > On Jan 30, 2019, at 1:27 PM, gedau AT igor2 DOT repo DOT hu wrote: > >See my point? pcb-rnd is strong in that. When they can't load=C2=A0 >organization A's kicad board at organization B's protel/autotrax, >that's=C2=A0 >where you jump in with a Makefile that uses pcb-rnd to convert. No >sch=C2=A0 >involved. No GUI PCB editing involved. Not funneling anything in, not=C2= =A0 >locking in users.=C2=A0 > > >I can see the use of that. One disadvantage, though, is that the layout >winds up another generation removed from the controlled schematics.=20 I don't see that as a disadvantage: having options, not forcing the user=20 to follow one workflow is a feature, not a bug. I see the benefit of a purely sch-driven flow, and we do support that too.= =20 But other users prefer other flows, and it's not all black and white=20 either: there are a lot of in-between flows. A good tool can support=20 anything on the spectrum. The other day I had a board where I strated with pcb-rnd and wanted to=20 export a netlist just to make it easier to see if the result made sense on= =20 the circuit level. It's not common for me to do this workflow, but=20 occassionally happens, because in some cases this is the most efficient=20 solution. Having a tool that tells me "hey, you can't do that, you have to= =20 draw the schematics first!" would not be an advantage for me. In fact a potential pcb-rnd user coming from some commercial EDA had this= =20 first question about pcb-rnd: "can I draw without a netlist?" >Can you test netlist topology for equivalence? In a pure, direct, netlist-oriented sense: no, as netlist is only=20 complementer info on the board, it does not exist alone in pcb-rnd - we=20 don't have tools that deal with netlists alone (beyond import/export),=20 it's always the netlist-board relation. However, in a netlist-board relation it is possible: 1. you can load board A (that contains netlist A); you can check if the=20 board matches the netlist 2.a. you can import netlist B into that board, replacing the original=20 netlist in the board; if you then do a connection check (rats=20 optimization), you compare netlist B to board A, which (because of the=20 step 1 check) really means comparing netlist A to netlist B 2.b. you can export the current netlist from a board into a netlist file=20 you can later load again. This provides another way of doing 2.a., by=20 swapping the netlists of board A and board B with netlist exports and=20 imports Since we are thinking in PCB terms, netlist equivalence for us means: the= =20 two netlists have the same components with the same refdes' and the same=20 connections between the same pins of the same components. However, network= =20 names don't have to match. For a more abstract, more schematic-oriented netlist comparison, you'd=20 export both netlists from both boards and import them in a schematic=20 editor or drc or whatever other tool to compare them. All pcb-rnd can do=20 for this is offering netlist export that is easily accessible from both=20 CLI and GUI (and it's all done already). So from pcb-rnd side this is possible. And this is where cooperation with= =20 other projects and "use cases and users in the center, not code or=20 projects" come in: pcb-rnd doesn't want to be a schematic capture tool, so= =20 this part is out of scope. Instead we want to have good cooperation with=20 schematic caputre software so we can get this work by getting our tools to= =20 work together. With xschem we do have this kind of cooperation and we did achieve a lot=20 in very short time. With gschem (Roland) we had a smaller version of this= =20 for a few days - git gschem has back annotation from pcb-rnd (but it=20 didn't reach pcb-rnd users because of no release and the cooperation=20 faded). With Lepton we never had it (all my different attempts to build=20 any kind of cooperation failed and I eventually gave up). So if you meant "why not lepton" in the sense why I am not promoting=20 lepton: because that's not my preferred tool as an user (for many reasons)= =20 and because as a programmer I see that's not where cooperative progression= =20 of the toolkit/ecosystem (that pcb-rnd part of) is happenning. Meanwhile I= =20 do see it happening with xschem daily. It's an opt-in thing, I can't=20 force it. Regards, Igor2 --0-397992029-1548879139=:21900--