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Date: Sun, 13 Aug 2017 14:53:57 +0200 (CEST)
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Subject: Re: [geda-user] pcb slotted holes for relay
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On Sun, 13 Aug 2017, Carlos Nieves wrote:

> I don't think this is the right way... Specially for plated holes. Fabs usually check that there is a distance between copper and the board outline, so copper is not exposed at edges.
> Doing it that way will results in failing that drc and having to postprocess the outline file...

Well, the complete final solution would one of these:

Option A:

1. you define two layers groups, both with type "outline" so that pcb-rnd 
understands they are milled with a router; one of them is the real outline 
layer and unplated slots, the other is the plated slots [this is not yet 
possible, pcb-rnd assumes there's only one outline layer; not terribly 
hard to fix]

2. the slot layer needs to be marked as 'plated' so all objects 
drawn there behave like vias, connecting layers [not yet possible; 
somewhat harder to do, but still on the relatively easy side]

3. implement your footprint as a subcircuit, draw your slot as a line on 
the 'slot' layer; this will result in a plated slot; you may want to add 
some copper lines/polys around it on the top and bottom sides [this is 
already possible since release 1.2.4]

4. tag the slot and the top/bottom copper lines/polys to the same terminal 
("pin number") so the netlist understands the connection [I'm working on 
this these days, will be possible in 1..2 weeks]

5. on export you simply get a normal unplated outline layer and a plated 
slot layer separately; you can then name the files accordingly or tell the 
fab house and I am sure they will understand not to run the 
copper-distance DRC on the slots [this step, exporting multiple outline 
layers, is already possible, if an export naming style is selected that 
doesn't result in overwriting the same file twice]

Option B:

after the subcircuit upgrade, next target will be pad stacks. I am tempted 
to introduce "hole shapes": for a common via or pin you'd use a circular 
hole (drill) but it would also allow lines for slots. This way the 
resulting construct is like a via (pin) in all regards. According to my 
current plans I will probably start coding pad stacks this year; having 
non-circular hole is a smallish task compared to the rest pad stacks need, 
so it's rather probable that we have this. In this setup the slots would 
end up in the plated drill file, much like your example showed.



Note: eventually both methods will be available. The only question is 
when, which also depends on how much pull they get from active pcb-rnd 
users. At the moment pad stack seems to be the one that would be 
implemented first.

Regards,

Igor2