On T= ue, Mar 28, 2017 at 2:08 PM, Britton Kerin (britton DOT kerin AT gmail DOT com) [via geda-user AT delorie DOT com] <geda-user AT delorie DOT com><= /span> wrote:

On Tue, Mar 28, 2017 at 6:19 AM, John Luciani (jluciani AT gmail DOT com)
[via geda-user AT delorie DOT com] &l= t;geda-user AT delorie DOT com> wr= ote:
> On Tue, Mar 28, 2017 at 9:24 AM, <karl AT aspodata DOT se> wrote:
>>
>> John Luciani:
>> > I create stencil footprints with the same basename as
>> > the component footprint and a ".sfp" extension. I h= ave
>> > a script that parses the pcb and identifies all components >> > that have a stencil footprint.

I couldn't find this script on your page.=C2=A0 Could you please= post or link?

The script isn't qui= te ready for prime-time.
=C2=A0

>> Yes, that would be a way of doing it, similar to DJ Delories metho= d.
>>
>> Then I could have a flag in the fp generator to either make paste = pads
>> as thin line silk for checking or write the pads to the sfp file.<= br> >>
>> Do you have any specific file format for your sfp files ?
>>
>
> I just make them as normal footprints. For example - the stencil footp= rint
> below is for a Cree XP-G LED --
>
> Element[0x0 "LED" "" "" 0 0 9996 2996 0 = 100 0x0]
> (
>=C2=A0 =C2=A0 Pad[-5511 -5511 -5511 5511 1968 2000 2968 "" &q= uot;1" 0x0100]
>=C2=A0 =C2=A0 Pad[5511 -5511 5511 5511 1968 2000 2968 "" &quo= t;2" 0x0100]
>=C2=A0 =C2=A0 Pad[-492 -3937 492 -3937 2952 2000 3952 "" &quo= t;3" 0x0100]
>=C2=A0 =C2=A0 Pad[-492 0 492 0 2952 2000 3952 "" "3"= ; 0x0100]
>=C2=A0 =C2=A0 Pad[-492 3937 492 3937 2952 2000 3952 "" "= 3" 0x0100]
>=C2=A0 =C2=A0 ElementLine[7996 -2484 7996 -7996 1000]
>=C2=A0 =C2=A0 ElementLine[7996 -7996 -7996 -7996 1000]
>=C2=A0 =C2=A0 ElementLine[-7996 -7996 -7996 -2484 1000]
>=C2=A0 =C2=A0 ElementLine[7996 2484 7996 7996 1000]
>=C2=A0 =C2=A0 ElementLine[7996 7996 -7996 7996 1000]
>=C2=A0 =C2=A0 ElementLine[-7996 7996 -7996 2484 1000]
>=C2=A0 =C2=A0 ElementArc[-7996 -10496 500 500 0 360 1000]
> )

Then what?=C2=A0 Is there another script that modifies generated ger= bers or
produces another layer that gets sent to the fab?

What I do is convert the pcb layout into a stencil pcb layout. <= /div>

I export the stencil pcb layout as gerbers and send them to the s= tencil

house.

=C2=A0

What I've always done is just not care about parts that call for a grid= of
paste squares and I haven't had any failures so far, but those designs<= br> have all seen only small production runs.

For thermal pads I always use the grid. I have se= en a lot of production
problems. Bridging and misalignments. On these l= arge pads I use a grid
which reduces the coverage to between 50 - 60%. =

Britton

http://www.wi= blocks.com =C2=A0

--f403045e9e1068a65c054bd2c49d--