X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:from:date:message-id:subject:to; bh=nHUiak3U6pH1Xk+WbhYnoHJ8EobKVxS3ZAMX1DijZhw=; b=YgzRTli5ST2b03uOZGU7Tgmpa7YwKjG9geoFLdkSHHceiyBbdLXU82/15u56HO5k1L iqOxB6mjLB5D/rd3mXil5pWnmoAFDnyX7lvkOkxkKQMPG45TYy313Oz3CCObqFUXy6it wypGN3aDmwFnM/pJK5/ObI1wcLcoj35SUPwnbwRO4zXileucQyv4e23/QzbJ8ojaJHIB nCN0Vufjym/iAQqlWbaghQ36iH4MSFAHD7kTwssLTLKut5bvUzBi0P4oYx6OXjYEoXI/ WUEBxHT1WytgbLrHN1uDZ8fiuQ/gsJsmDpgeyT9Mr5BGeSqcqiBmWWFiavigVhPSjq98 bTEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to; bh=nHUiak3U6pH1Xk+WbhYnoHJ8EobKVxS3ZAMX1DijZhw=; b=GW1+30GBiBIzdnvlg6Fz6lpdjPMBd+E+Gq3bRGy70sF3Z6pWTb2jHWOWXKXxu+JsLK OPSpE38MerIqQsH8ijjxE9ZcnTiePXFddtLyRqZ09oLmWCPTiZ97PG77OOv27+vEn6/R scbHYd8Y34YvPpIX68fTvggjPcPtn9FYs3fUu71zpepGk7OLRnU4HgH7XmpNAGpPZe1C REvUQzC7ReS5615n46yTZk73/3v8Xl4yEA2wByuOeYGjLL/WZvYwAB4a/evZ7QIcyyA9 BxnRrSp2zGo1vQlhj2IhcJ2jYj2nkaQ80qSykd9JuY8/vWJKkigdgfAlrbTBbbmSLZuU 7P3w== X-Gm-Message-State: AEkoouugHSAJBEqffGPtFcIVDgdoglkJnzqaJa2OcS1HeaNbV/4+0Lwv29fxGvVdzx7sbngWSIGl12CM/Z1WKA== X-Received: by 10.36.130.135 with SMTP id t129mr17395745itd.31.1470153324744; Tue, 02 Aug 2016 08:55:24 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: <20160722171754 DOT GB17595 AT localhost DOT localdomain> <20160723065723 DOT GC17595 AT localhost DOT localdomain> <20160723092248 DOT GF17595 AT localhost DOT localdomain> <20160724053502 DOT GM17595 AT localhost DOT localdomain> <9719FF2C-AC85-4824-89E9-447216E7FA65 AT sbcglobal DOT net> <939E39F7-B4DA-4B56-A640-C7E6E4ECF955 AT sbcglobal DOT net> From: "Ouabache Designworks (z3qmtr45 AT gmail DOT com) [via geda-user AT delorie DOT com]" Date: Tue, 2 Aug 2016 08:55:24 -0700 Message-ID: Subject: Re: [geda-user] Plans for gEDA/gaf (was: [OT] ngspice integration in KiCad) To: geda-user AT delorie DOT com Content-Type: multipart/alternative; boundary=94eb2c0890faafd5f5053918bee6 Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk --94eb2c0890faafd5f5053918bee6 Content-Type: text/plain; charset=UTF-8 I already started such a project: http://hedmen.org/xi/ > > Tried it on Ubuntu 15.10 and I get: xi: XCreateFontSet: Unable to create font set Still it looks like a nice project. Ambitious but you have a well though out list of features. My main concern is that you are starting out with the constraint that you must support geda file formats. I would start out with zero constraints on your formats and get something working first. Then worry about how to support geda. If you start out with geda then that will drive how you architect the entire tool. You want to do that with a blank slate. You should also design a tool for all electrical engineers and not just board designers. Yes I want to do PCBs but I also want to design the ICs that populate those boards. I want to use my IC tools like verilog and spice to simulate the entire board. I want to design products with multiple boards and wire harnesses as well. And I want to generate graphics for my documentation at every step on the way. This group has shown almost no interest in features that are needed by IC designers if they are not also needed by PCB designers. John Eaton --94eb2c0890faafd5f5053918bee6 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable


I already started such a project: http://hedmen.org/xi/


Tried it on Ubuntu 15.10 and I get:

xi: XCreateFontSet: Unable to create font set


Still it looks like a nice project. Ambitious but you have a well = though out list of features. My main concern is that you are
= starting out with the constraint that you must support geda file formats. I= would start out with zero constraints on your formats
and ge= t something working first. Then worry about how to support geda. If you sta= rt out with geda then that will drive how you=C2=A0 architect the entire to= ol. You want to do that with a blank slate.


You shoul= d also design a tool for all electrical engineers and not just board design= ers. Yes I want to do PCBs but I also want to design the ICs that populate = those boards. I want to use my IC tools like verilog and spice to simulate = the entire board. I want
to design products with multiple boa= rds and wire harnesses as well.

And I want to generate gr= aphics for my documentation at every step on the way.

Thi= s group has shown almost no interest in features that are needed by IC desi= gners if they are not also needed by PCB designers.


J= ohn Eaton

=C2=A0



=C2=A0
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