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        Tue, 21 Jun 2016 08:58:25 -0700 (PDT)
Date: Tue, 21 Jun 2016 17:58:20 +0200
From: "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To: geda-user AT delorie DOT com
Subject: Re: [geda-user] "keepaway" vs. "clearance"
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On Tue, 21 Jun 2016 09:46:06 +0200
"Jiří Čejka (jirkacejka AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> wrote:

> 
> > Igor2:
> >
> > I am still rewriting the conf system in pcb-rnd. Seemingly the same idea
> > is sometimes called "clearance" (more common on the GUI?) and "keepaway".
> >
> > Is there any difference?
> >
> 
> Yes. As Karl mentioned before, Clearance is a space between two copper 
> traces or copper made elements like pads. On the other way, Keepaway is 
> a polygon you usualy draw into PCB and which represent DRC rule to 
> inform autorouter to not place any cooper inside that polynomial area 
> for some reason. I remember I read something about it years ago in 
> CadSoft Eagle Help.
> 
> Jiri Cejka
> 
> 

Yes clearance is space between objects as is now it is only for copper. Then I also read the term minimum copper spacing and think it was for minimum possible value to etch. Minimum clearance below minimum copper spacing is almost certainly a design problem.

For simple logic circuit there is usually only a need for one clearance value. For highere voltages or matched impedance higher value is however useful.


It is also useful with clearance between components. For the most cases component size implicitely given from component drawing primitives like silkscreen for space needed above circuit board work great. For other cases it is useful with an explicitely given space drawn on a specific layer above circuits board. In my oppinion this clearance above circuit board really is a cut out in the space above the board although a negative image work well for solder mask.


Nicklas Karlsson