X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f
X-Recipient: geda-user AT delorie DOT com
Date: Wed, 27 Jan 2016 05:56:19 GMT
From: falcon AT ivan DOT Harhan DOT ORG (Mychaela Falconia)
Message-Id: <1601270556.AA03533@ivan.Harhan.ORG>
To: geda-user AT delorie DOT com
Subject: Re: [geda-user] [pcb] poll: burried/blind vias vs. pcb and pcb-rnd
 (How ?)
Reply-To: geda-user AT delorie DOT com

gedau AT igor2 DOT repo DOT hu wrote:

> Both PCB mainline and pcb-rnd are free software, and you are perfectly 
> free to sit down and implement whatever changes/feature you want and use 
> and distribute the result. However...

And it is quite possible that I will indeed some day produce my own
fork of gPCB that is specifically taylored for making old-style
cellphone boards, i.e., cellular devices made with older chipsets that
are less integrated than the current mainstream and therefore require
a lot more board-level interconnections between components, which in
turn drive the requirement for blind & buried vias.

For comparison, currently-made dirt-cheap Chinese cellphones of the
throwaway kind (*not* the high-end smartphones) made with current
chips (one fully integrated main chip and one fully integrated RF PA
and antenna switch, no SAW filters) have 4-layer PCBs with only top
to bottom vias.  On the other hand, if I want to build the same kind
of ultra-basic cellphone using older chips (the ones for which I have
full documentation and firmware source code - not an easy thing to get
in the world of cellular baseband chipsets), I need at minimum a
6-layer PCB with controlled-depth laser microvias (a type of blind vias)
and buried inner vias, i.e., a via structure of L1-L2, L2-L5, L5-L6.
That's the absolute basic minimum; if I want to add musical ringtones
and a nice color LCD which these old chipsets don't support natively,
the board complexity increases to 8 layers with a via structure of
L1-L2, L2-L7, L7-L8 or even L1-L2, L2-L3, L3-L6, L6-L7, L7-L8.  All
cited examples are based on actual commercial products made in the
days when the chips of interest to me were current - just under a
decade ago.

I fully expect that I will need to produce my own fork of gPCB in
order to produce boards of this kind with free software; I don't
expect anyone else to do it for me in the foreseeable future.  And I
probably *will* get around to doing it eventually, but I just don't
know when.  For my first cellular board design someone else already
stepped forward to do it for me in Altium - while I won't use such
proprietary sw myself, I won't look a gift horse in the mouth either -
the people who are doing this PCB layout for me are effectively
donating their labor which would cost many thousands of dollars at the
standard commercial rates.  (I'm talking about the cost of PCB layout
desk work labor, not EDA software licenses or physical PCB fab costs.)
But maybe I'll be doing the next board version myself, in which case I
would need to create the needed gPCB fork first.

> ... however, and correct me if I'm wrong, I can't recall you even 
> answered the 10 questions of the poll running for a week.

Apparently that poll and all associated discussions took place while
my email was down.  I was completely down from Jan 11 till Jan 22: I
had lost a billing dispute with Verizon Business (a dispute over an
extraneous charge of about $20 every month, but they dragged that
dispute out over the course of almost two years, and when I finally
lost earlier this month, I owed them some outrageous amount with late
fees added and whatnot), and they shut me off until I could pay their
racked-up bill.

> (And yet more probably you won't sit down and 
> invest even more time implementing it.)

Wrong: the next time I need a board with blind & buried vias and no
third party steps forward to do that board design for me in some
"mainstream" proprietary EDA package which I won't use myself, I will
have no option but to sit down and implement my own fork of gPCB with
the necessary b/b via support.  I just don't know whether it will be
late 2016 (the earlier possibility as my FreeCalypso project
circumstances stand right now) or 2017 or 2018 or ...

> It doesn't seem like anyone is trying to limit your freedom in any way, 
> it's more like you didn't step up when you could express your opinion, 
> when asked for this sort of contribution.

See above regarding my email having been down thanks to my scumbag ISP.

> I may totally misunderstand 
> this, but I though freedom was about you are free to take certain 
> actions, not about we are obligated to do whatever you want, in your 
> interest, without your slightest contribution.

I was *not* asking *you* or any other developer to implement b/b vias
for me; I have already fully accepted that I will need to implement
them myself when I reach the point of needing them in a board which
I'm doing myself, as opposed to someone else doing the layout based on
my netlist with their choice of software.  I was simply replying to
DJ Delorie, correcting his misconception in that someone who can
afford the physical fabrication of PCBs with b/b vias (particularly
the most expensive variety with controlled depth drilling) can also
afford the big $$$ EDA tools - sure, we could easily afford the
license costs of that sw even if we couldn't get it at zero cost from
TPB, but it is still disgusting proprietary sw with all inherent
problems that come with proprietary sw, and some of us want free sw
instead.

M~