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Date: Tue, 19 Jan 2016 17:31:25 +0100 (CET)
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To: "Peter Clifton (petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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Subject: Re: [geda-user] pcb loop paste buffer, renumber (first multi channel
 design)
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On Tue, 19 Jan 2016, Peter Clifton (petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com] wrote:

>
>Really you need to have a reuse at the schematic level before you can expect
>any intelligent behaviour in the pcb tool.
>
>I've done multi channel designs with hierarchical schematics before... The
>rename just becomes X1/R1 -> X2/R1 etc...
>
>My rename plugin might still be floating about somewhere "sedrename"... Now
>we've got more plugins committed with the main repository, it might be fun
>to dig that one out and include it too... Was very handy when your
>transformation between channels can be expressed as a regex.
>
>The main downside with heirarchical refdes is the silkscreen and board fab
>house. They HATED IT. Couldn't cope with the long heirarchical refdes,
>didn't WANT to cope with the patch I applied to just put the last
>heirarchical part on the silk by each part, but then drew boxes manually
>with module designations.
>
>In the end, I used pcb's renumber feature to assign completely new refdes on
>the board, but instead of back annotating (impossible as we stand, with
>heirarchical schematics), I added a quick kludgy patch to read back in the

Side note: in theory my back annotation could handle hierarchical 
schematics. In practice it can't, because:

- it can't ensure all relevant pages are open in gschem (aka "which 
sch files make up this schematics"; smaller issue)

- it can't invent the full hierarchical refdes from within gschem (bigger 
issue); e.g. can we search for x2/r1 on the UI?

- even if it could, it would make up new corner cases; e.g. a design 
having two instances of the same schematic box as x1 and x2, then two 
components "x1/r1" and "x2/r1"; if there's a change to "x1/r1", it's not 
clear how to _indicate_ this to get the user to change the schematics 
without also changing "x2/r1".

>rename file, so pcb could map between the gnetlist produced heirarchical
>netlist, and the flat refdes on the board.
>
>Made debugging extra fun, having to manually indirect from heirarchical
>schematic refdes to on board refdes, but at least it didn't upset the board
>assembly fab!

Been there. Did a hierarchical design, went to pcb, then figured refdes' 
are way too long.

I am "my own fab house" and do silk layers with toner transfer. Increasing 
resolution to go for smaller font wouldn't work with that process.

For my last few boards I started to use a manual numbering convention: 
letter-digit-digit-digit, where first two digits are sort of "postal code" 
for which logical part of the schematics (or hierarchy or whatever) has 
the part. Of course it breaks when I need more than 10 resistors for a 
part. I am not sure what naming convention would both represent the 
hierarchy for at least 2 levels and stay short.

Regards,

Igor2