X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type; bh=CN7x2iSh51ifcQ9peIAcXRTlyOODnGX9ZDRgTUU62Zs=; b=bnMVJHN3JNO2p9+6s/CJaR/JaWL2aZ17TQcxP6Vmj+cSkcPh/EjyOacfeqHs7HYV4L F9d1KBh2JgJLzJflcOGj0yTNLOJNwHzqcCorSPbbtYR94jvYlpeALL33fBHv9Q98Dm89 BBjWGWFvvTI4NoUMyov9jmOLlCyfKNgpJXgpwrNq2Uql+CIXf1jdPbMFYpxeVS+6l5NO y/xfQbVDeNAPLpFUVF4DQZP3JozVJ+DFuYxUvJJs/XKsNjGuVoV9ri3xjvNly0Pv86xF bDDOCtv8s1tRuiSAhu9dwp8JonFDuyLr29kiXa5i4LG86uC5Dh6x5udnlPujja5L3QLc 9YWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:content-type; bh=CN7x2iSh51ifcQ9peIAcXRTlyOODnGX9ZDRgTUU62Zs=; b=Q23ArQV7QBqDaQbCSqumVOWRlILpHWS4vkAoaJMF1Y4pumDIky3q2Uhhhg9uYRzihM mgxE/LsXm+yaUkPPGeMaHMza+Ri2+i3ioMTxWJmiEY7Qmfii4ay8yENUKc7+6uWKkBTG hS5TnPhPa0zp/HBs6XtUWgToNQi3eDT/t8Dptujodn4tsrMtq5bxraV1haTZJzWn2biy MA7Ws58LHbiOJ7YRKtk8KKZQ742YrZUp8Fmti3dnviETDMuzssEIMz/0a1bkh1fGGB+h ir963V/4+xPl2TQASDr7iSqHB1F9yphK5IcMiBOujBqy8sLrt3RqunafEVQchGqs8OE7 mSIg== X-Gm-Message-State: ALoCoQkda5WzuQ4kCwVk78xGPiIUjf8eEyUZ7o1pkXc7J+Sznr9AgJLR+h03BcGKMlLp2swsvd4HdtzwTp56IWH/ACyf9XV/XQ== MIME-Version: 1.0 X-Received: by 10.60.246.43 with SMTP id xt11mr23648381oec.48.1453218824349; Tue, 19 Jan 2016 07:53:44 -0800 (PST) In-Reply-To: <569E4CE9.6030900@iee.org> References: <20151021192359 DOT 3dd8ad6d253c781da5523554 AT gmail DOT com> <201510211839 DOT t9LIdVcv027165 AT envy DOT delorie DOT com> <20151021222506 DOT 79643602de30ad2dd5541165 AT gmail DOT com> <20151022115247 DOT 3c1c2f13 AT akka> <20151022123903 DOT dddb6c83fa5a3db0963f4162 AT gmail DOT com> <201510221641 DOT t9MGfxJq003243 AT envy DOT delorie DOT com> <20151022212642 DOT abe0686f3bb04a3067667c43 AT gmail DOT com> <201510221951 DOT t9MJpjgA013544 AT envy DOT delorie DOT com> <562951C5 DOT 2010500 AT xs4all DOT nl> <562B531C DOT 5090004 AT xs4all DOT nl> <20160118171041 DOT 60f9ff0fd41a668af0fa84f4 AT gmail DOT com> <569D3751 DOT 2020402 AT xs4all DOT nl> <569D4266 DOT 7000905 AT prochac DOT sk> <20160119135636 DOT 8b2397941a5d4c4f48c9a626 AT gmail DOT com> <569E3532 DOT 2000701 AT iee DOT org> <20160119145802 DOT 81daa1f66cbb5cfebbba834c AT gmail DOT com> <569E4CE9 DOT 6030900 AT iee DOT org> Date: Tue, 19 Jan 2016 15:53:44 +0000 Message-ID: Subject: Re: [geda-user] pcb loop paste buffer, renumber (first multi channel design) From: "Peter Clifton (petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com]" To: gEDA User Mailing List Content-Type: multipart/alternative; boundary=001a11368e40ce6fd10529b1dfcc Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk --001a11368e40ce6fd10529b1dfcc Content-Type: text/plain; charset=UTF-8 Really you need to have a reuse at the schematic level before you can expect any intelligent behaviour in the pcb tool. I've done multi channel designs with hierarchical schematics before... The rename just becomes X1/R1 -> X2/R1 etc... My rename plugin might still be floating about somewhere "sedrename"... Now we've got more plugins committed with the main repository, it might be fun to dig that one out and include it too... Was very handy when your transformation between channels can be expressed as a regex. The main downside with heirarchical refdes is the silkscreen and board fab house. They HATED IT. Couldn't cope with the long heirarchical refdes, didn't WANT to cope with the patch I applied to just put the last heirarchical part on the silk by each part, but then drew boxes manually with module designations. In the end, I used pcb's renumber feature to assign completely new refdes on the board, but instead of back annotating (impossible as we stand, with heirarchical schematics), I added a quick kludgy patch to read back in the rename file, so pcb could map between the gnetlist produced heirarchical netlist, and the flat refdes on the board. Made debugging extra fun, having to manually indirect from heirarchical schematic refdes to on board refdes, but at least it didn't upset the board assembly fab! I suppose I could also have post proceed out a flattened set of schematics with the renamed refdes if that became useful. Peter On 19 Jan 2016 14:51, "M. J. Everitt (m DOT j DOT everitt AT iee DOT org) [via geda-user AT delorie DOT com]" wrote: > > On 19/01/16 13:58, Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via > geda-user AT delorie DOT com] wrote: > >>> I tested and as far as I understand it works like this: > >>> x is old refdes number > >>> n increase with this value > >>> Rx --> Rx+n > >>> > >>> I have subsheets and numbers look like this: > >>> x is old refdes number > >>> n increase with this value > >>> want this S2/S1/Rx --> S2/S1+n/Rx > >>> but get this S2/S1/Rx --> S2/S1+n/Rx > >>> and the need is to change subsheet number and use this for another > channel. > >>> > >>> For rename to work reasonable well there must be an integer difference > between refdeses for different channels. Default for subsheet is Sn/Sn/Rx > there where are two level of hierachy but it use quite a lot of space. To > add an integer value to refdes use less space. I could add some kind of > wild card so that both changing subsheet and adding an integer value to > current subsheet works? > >>> > >>> I also add comment then this is used. Sometimes layout data need to be > reused for several channels and in such case it is possible to simply > select the layout, copy, rename refdeses and paste. Then doing a multi > channel copy and paste really speed up design work. > >>> > >> For this purpose, if you have a schematic, I just use "Autonumber > >> attributes" in gschem ... > > Well gschem is not a problem. If you have done the layout of one channel > for example a half bridge in a three phase circuit it is possiblo to copy > and paste this layout including lines for copper traces but to get > connections right refdeses must be changed. > > > > To copy layout for one a channel in pcb is really powerful yet simple to > understand. Ideally somewhere in the future I think selector to select > which subcircuit currently is worked on for this purpose would be an > improvement but simple copy is essentially already there. > > > > Nicklas Karlsson > I can see your dilemma. Perhaps the best way to handle this (as I've > seen in other apps) is simply to add a '_copy' suffix to the refdes when > you paste it, and then handle renaming from there. It's a difficult > case, I can see what you'd like to do .. but in practise I think there's > a lot of code required to figure out your netlisting mix/match .. the > software has no way of knowing where your 'new' circuit has come from, > or what you want to 'assign' it to in an existing netlist/schematic, so > it would have to be a very simple rename rule. > > MJE > --001a11368e40ce6fd10529b1dfcc Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable

Really you need to have a reuse at the schematic level befor= e you can expect any intelligent behaviour in the pcb tool.

I've done multi channel designs with hierarchical schema= tics before... The rename just becomes X1/R1 -> X2/R1 etc...

My rename plugin might still be floating about somewhere &qu= ot;sedrename"... Now we've got more plugins committed with the mai= n repository, it might be fun to dig that one out and include it too... Was= very handy when your transformation between channels can be expressed as a= regex.

The main downside with heirarchical refdes is the silkscreen= and board fab house. They HATED IT. Couldn't cope with the long heirar= chical refdes, didn't WANT to cope with the patch I applied to just put= the last heirarchical part on the silk by each part, but then drew boxes m= anually with module designations.

In the end, I used pcb's renumber feature to assign comp= letely new refdes on the board, but instead of back annotating (impossible = as we stand, with heirarchical schematics), I added a quick kludgy patch to= read back in the rename file, so pcb could map between the gnetlist produc= ed heirarchical netlist, and the flat refdes on the board.

Made debugging extra fun, having to manually indirect from h= eirarchical schematic refdes to on board refdes, but at least it didn't= upset the board assembly fab!

I suppose I could also have post proceed out a flattened set= of schematics with the renamed refdes if that became useful.

Peter

On 19 Jan 2016 14:51, "M. J. Everitt (m DOT j DOT everitt AT iee DOT org) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> wrote:

On 19/01/16 13:58, Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via
geda-user AT delorie DOT com] wrote:<= br> >>> I tested and as far as I understand it works like this:
>>> x is old refdes number
>>> n increase with this value
>>> Rx --> Rx+n
>>>
>>> I have subsheets and numbers look like this:
>>> x is old refdes number
>>> n increase with this value
>>> want this S2/S1/Rx --> S2/S1+n/Rx
>>> but get this S2/S1/Rx --> S2/S1+n/Rx
>>> and the need is to change subsheet number and use this for ano= ther channel.
>>>
>>> For rename to work reasonable well there must be an integer di= fference between refdeses for different channels. Default for subsheet is S= n/Sn/Rx there where are two level of hierachy but it use quite a lot of spa= ce. To add an integer value to refdes use less space. I could add some kind= of wild card so that both changing subsheet and adding an integer value to= current subsheet works?
>>>
>>> I also add comment then this is used. Sometimes layout data ne= ed to be reused for several channels and in such case it is possible to sim= ply select the layout, copy, rename refdeses and paste. Then doing a multi = channel copy and paste really speed up design work.
>>>
>> For this purpose, if you have a schematic, I just use "Autonu= mber
>> attributes" in gschem ...
> Well gschem is not a problem. If you have done the layout of one chann= el for example a half bridge in a three phase circuit it is possiblo to cop= y and paste this layout including lines for copper traces but to get connec= tions right refdeses must be changed.
>
> To copy layout for one a channel in pcb is really powerful yet simple = to understand. Ideally somewhere in the future I think selector to select w= hich subcircuit currently is worked on for this purpose would be an improve= ment but simple copy is essentially already there.
>
> Nicklas Karlsson
I can see your dilemma. Perhaps the best way to handle this (as I've seen in other apps) is simply to add a '_copy' suffix to the refdes= when
you paste it, and then handle renaming from there. It's a difficult
case, I can see what you'd like to do .. but in practise I think there&= #39;s
a lot of code required to figure out your netlisting mix/match .. the
software has no way of knowing where your 'new' circuit has come fr= om,
or what you want to 'assign' it to in an existing netlist/schematic= , so
it would have to be a very simple rename rule.

MJE
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