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Date: Tue, 22 Dec 2015 22:02:14 +0000
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Subject: Re: [geda-user] Prop ... Structure? (Clearance calculation)
From: "Peter Clifton (petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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> Then there is the problem is there is an unconnected object within distance but I guess it could worked around if not already done by at least temporary assign all objects to a net.

I "think" this works ok, but I'm on a Win7 box with no PCB right now
to check... OK, no wait - I did install PCB (remember it also ports to
Win32 if you like masochism)...


So - it "nearly" works.. two tracks violating DRC clearance, on a
board with no netlist - no DRC results.
Throw down a via, and touch it to one of those tracks - and we see 1x
DRC violations - "Copper areas too close".

Bug - one I'm sure could be fixed. We're probably just not iterating
over all of the non "PV" type objects as potential DRC check
start-points. (DRC draws a distinction between the in-layer objects
like lines, arcs, polygons etc.. and the "PV" type objects (pin, via),
which can traverse layers..

> Step 1 may would be really good but a net attribute would be a good start. Then is the question if attribute should specify clearance value or voltage. It would also be possible to use units like this: clearance = "0.3mm" , "25mil", "250Vac", "45Vdc" and it would be possible to later add functionality to automatically assign the net clearance attribute from pin values.

For design intent, voltage is important - but ideally, specify it in a
more semantic way.

Aside: I could write voltage=250V with the correct AP210 primitives,
but it would probably take a page worth of boilerplate to define the
SI unit quantities, specify tolerances, define the property of the
object, instancing an instance of the property, mapping it onto the
object owning the property, assigning it a value etc...
I'm mocking STEP and its complexity - this genuinely is an almost fair
representation of how it defines properties... but there is a reason
why they do it this way. (Not entirely sure I know the reason though
;)).

Ultimately, PCB should not work from voltages. This is the same reason
I don't want to derive computed outlines from content on the "outline"
layer - once you've implemented an algorithm, you're stuck with it.

By all means, add attributes such as voltage, and have helper actions
to operate on those (and perhaps produce clearance attributes).


The safe option is to specify pairwise clearances between nets, (or
groups of nets). This way, the designer can set, and/or check them.
Regulatory requirements aren't always exact based upon voltages...
often they are arbitrary distances if the voltage is in range a<V<=b.
The distance will almost certainly ALSO depend on the environmental
class, PCB coating technology, isolation requirement (double insulated
/ functional / ....).

Whilst you could throw in a calculator for such things - your
calculator would never be the normative standard reference. There is
one online here... http://www.creepage.com/
Looks like they got permission from the IEC to use the required
standard data. Note the disclaimer "Consult with IEC 60950 for all
final design decisions" etc...


>> Let me know if I can be of any help if you decide to proceed. Its been
>> a while since I braved PCB's DRC code, but I was at one point familiar
>> with it.
>>
>> Peter
>
> Can you figure which objects belong to which net?

Give me an example of what you mean, and I will try...

Do you mean like the "f" action to highlight connected objects?

You'd start with that code, but seed it with a first object you know
is in the netlist for a given net. (I hacked that some while back to
add the green / purple coloring distinction between whether the object
_IS_ connected, or _SHOULD BE_ connected to a given starting point.
(Got burnt by a design error overlooked by that distinction being
missing before!).

I'll warn you that the code is fairly horrid. I think it lives in
"find.c", with the dragons.

Peter