X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type:content-transfer-encoding; bh=AjdQVrh1umVLhFPX6SuMx5axKSGhycqqbAVYri2xArg=; b=r3mr9+b7sxADMCCx3pZMYSTVZvHmmioi9G/DJ5p7YDpt/lPDdLZxy+alQB5tzTy8qk CFzCAmbmCHSqDMz0dl4T+2pauEoRmb2AwKLhW8k3gR0GsOfyn0scPZeak8hNecT1VSS0 9PEn1eiuYuvYQmbmwrj96c4f4m8qf/TXLvVC3fs6JZVeU7ZPi/8Yes3ulD1E2eMqB72V hO7sq4Ix+znCNy/D1LBAEtisEENtgeLVJC5FQV/5jNpyMw2Tf2yHuUTOTdmwgKzxApV4 WJxS+LLmqLpFp+vUJpMZUnDOTfe/XQ19Zom1Xtmw+jtlDzp4/kOqCZp/tOqjuP8dU5r2 sKFg== MIME-Version: 1.0 X-Received: by 10.112.162.162 with SMTP id yb2mr12770878lbb.94.1445667620546; Fri, 23 Oct 2015 23:20:20 -0700 (PDT) In-Reply-To: <2D8B5E30-150E-43A4-9994-458A78F2E282@noqsi.com> References: <201510220112 DOT t9M1Ccfq013731 AT envy DOT delorie DOT com> <201510220136 DOT t9M1a5Uw015222 AT envy DOT delorie DOT com> <201510220149 DOT t9M1nrIe016145 AT envy DOT delorie DOT com> <20151022023002 DOT GA25952 AT recycle DOT lbl DOT gov> <201510221643 DOT t9MGhFfg003310 AT envy DOT delorie DOT com> <20151022170259 DOT GA28154 AT recycle DOT lbl DOT gov> <20151022213200 DOT c3f45fb3723dbcef555df7b9 AT gmail DOT com> <201510221953 DOT t9MJr3Hp013618 AT envy DOT delorie DOT com> <20151023225207 DOT de1fcd7a8542af77b2c51127 AT gmail DOT com> <2D8B5E30-150E-43A4-9994-458A78F2E282 AT noqsi DOT com> Date: Sat, 24 Oct 2015 06:20:20 +0000 Message-ID: Subject: Re: [geda-user] Board DRC From: "Evan Foss (evanfoss AT gmail DOT com) [via geda-user AT delorie DOT com]" To: gEDA users mailing list Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by delorie.com id t9O6KRcL025160 Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk On Fri, Oct 23, 2015 at 9:47 PM, John Doty wrote: > > On Oct 23, 2015, at 2:52 PM, Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com] wrote: > >>>>> There should be exactly one short at the star ground point. If >>>>> algorithm calculate their lines meet at the edge end point have to >>>>> checked in some way. >>>> >>>> Or if a particular bit of copper could be tagged as "star point" or >>>> something, the algorithm could know that it should be the edge of >>>> multiple nets, and verify it. >>>> >>>> I'm just thinking, our DRC isn't designed to handle these types of >>>> problems, but a new DRC might, and give us other benefits too. >>>> >>> >>> I spent the morning in a video meeting reviewing a complicated layout from a geda-gaf->Allegro flow. The issues were far beyond the things discussed in this (thoroughly mutated) thread. We have segmented grounds, but not star connections. Star connections only work well if you can neglect inductive coupling. And then there ware other things: I was able to say at one point “Don’t worry about crosstalk between signals X and Y: they crosstalk so badly in the sensor that any conceivable crosstalk on the board will be negligible.” >>> >>> So, it’s complicated. I found myself wishing for a tool that would show concentrations of AC magnetic field. As far as I know, Allegro can’t handle these issues: humans have to pay attention. >>> >>> I don’t think a tool that works from the top down can ever do this stuff well. You need a bottom-up model of a circuit board to even start to think about how to analyze how your layout really works. Pcb has no such foundation, which is the root of the frustration it causes for a reductionist like me. >>> >>> John Doty Noqsi Aerospace, Ltd. >>> http://www.noqsi.com/ >>> jpd AT noqsi DOT com >> >> To do this kind of electromagnetic calculation the file format or internal storage in pcb is probably the smallest problem. > > Except that pcb doesn’t really do bottom-up description well. If it did, folks wouldn’t have been asking for buried vias for years: you could simply draw one. > > >> To show concentrations of AC magnetic field current need be known in each segment. Once current and shapes are known it I guess it will be possible to make calculations. Capacitance and inductance between nets would probably be more realistic and maybe not practical impossible? > > For IC design, we extract resistance and capacitance of the interconnections. From that, we can do SPICE simulations. But part of what makes this possible is that the tools build up the design from the bottom. Make a mask transparent in a certain spot, make a diode. Make two diodes, you have source and drain. Make a gate with a different mask, you get a transistor. Group together several transistors, make a gate. Group together several gates, make a flip-flop, … > > The tools work directly on structure rather than indirectly from intentions the way pcb does. You realize intentions by constructing structures (“cells”) rather than by utilizing pre-defined “features”. In the general case, this is easier to understand both for users and for processing tools. The difference between intentions and structure are why people make unintended SCR's in chip design though. (At least from the stories I have been told, I have never designed a chip) >> >> Trace impedance calculation however are probably more realistic, thes kind of calculations are available on the net http://www.eeweb.com/toolbox/microstrip-impedance together with equations. >> > > John Doty Noqsi Aerospace, Ltd. > http://www.noqsi.com/ > jpd AT noqsi DOT com > > -- Home http://evanfoss.googlepages.com/ Work http://forge.abcd.harvard.edu/gf/project/epl_engineering/wiki/