X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com Date: Wed, 22 Jul 2015 02:38:25 GMT From: falcon AT ivan DOT Harhan DOT ORG (Spacefalcon the Outlaw) Message-Id: <1507220238.AA03807@ivan.Harhan.ORG> To: geda-user AT delorie DOT com Subject: Re: [geda-user] [OT] I need help with selecting components Reply-To: geda-user AT delorie DOT com Thanks to everyone who replied to my request for help! DJ Delorie wrote: > Search digikey for "led 0603" (or whatever size you're comfortable > with) and use the stock 0603 (or whatever) footprints. OK, let's say I'm going to use this 0603 LED: http://www.digikey.com/product-detail/en/SML-510MWT86/511-1308-1-ND/637121 But what about the polarity? Standard 0603 etc footprints have no polarity, but for an LED the polarity matters very much. Should pin 1 be the anode and pin 2 be the cathode, or the other way around? And shouldn't I also modify the silk part of the footprint to mark this polarity somehow? It wouldn't do any good to have an LED stuffed onto the board backwards... > I like weidmuller connectors but any "barrier blocks" (another digikey > search) will do. Or pcb-mount banana sockets. Wow, it appears that those Weidmuller connectors you are referring to are exactly what TI used on their D-Sample and Leonardo reference boards. Look at the power connector on this board: https://www.freecalypso.org/boards/d-sample.jpeg Is it the same as what you had in mind? TI used the 3-pin version, with the middle pin unused. Since you said you like these connectors, would you perchance happen to have a PCB footprint for them already? Larry Doolittle wrote: > E-Switch TL1105AF100Q, over 12000 on the shelf at Digi-Key, > PCB footprint attached. Thanks, I like it! I think I'll use the TL1105E version (the actuator sticks out a little taller so I'll be less likely to touch something else on the board with my finger accidentally), but it's the same footprint, so the one you provided is still good. :) I also noticed that they have versions with different operating force. I'm thinking of using the "plain" version (brown, 100 g force) for the "normal" power-on button and the red, 250 g force version for the button that grounds the special nTESTRESET test-only net. Or would a 250 gf switch be too hard to press? I admit I don't have an intuitive feel for it... John Griessen wrote: > To estimate your system power draw, you can take the 2.5A at ?what? voltage > the spec you read says for a starting point. I don't have a good spec to work with, that's the problem. In a classic old-fashioned GSM cellphone design (I know nothing about "modern" 3G/4G smartphones) the power from the battery (VBAT) goes to 3 places: the regulators in the analog baseband chip, the regulators in the RF transceiver chip, and the Tx power amplifier. (Well, OK, in a complete cellphone there will be other VBAT consumers like the display backlight and the vibrator, but my current board design is just the core GSM modem subset.) The regulators in the baseband and RF chips are well-documented: they are LDOs, hence their current draw is fixed and that current times excess input voltage turns into heat. But all those baseband and RF circuits powered through those regulators don't draw a crazy amount of current, nothing close to that 2.5 A figure - I recall it being a few hundred mA when everything runs full blast. (As one would expect for a usable cellphone, there are extensive power management mechanisms throughout.) Instead the dominant power consumer in a cellphone is the radio transmitter, or in terms of the circuit structure, the Tx power amplifier (RF PA). Here is the datasheet for the RF PA I'll be using: ftp://ftp.freecalypso.org/pub/GSM/PA/RF3166SB.pdf But it doesn't say how much current it draws from VBAT (it's powered directly from VBAT, doesn't pass through any regulators) when transmitting at maximum power prescribed by GSM specifications. I know that the power output is controlled by the analog Vramp input (comes from a DAC in the baseband chipset), and I know that it is supposed to be calibrated on a per-unit basis on the finished device production line: the assembled cellphone or modem is connected to a test rig (there is an RF test connector that takes the place of the antenna), the device is commanded to transmit with a certain value loaded into the APC DAC register, and the power output is observed. The APC DAC value is adjusted until the output power matches what the GSM spec says it should be for each level, and the empirically determined corresponding DAC values are written into flash. But I don't understand what happens when the VBAT voltage going into the PA varies. In a standard cellphone design the PA is powered directly from the battery, so the voltage it sees will vary depending on how much charge the battery has in it: 4.2 V when the Li-ion battery is fully charged, and perhaps as low as 3.3 V when it is near empty. But I don't understand what happens to radio signal power output levels: do they stay constant (assuming constant level selection based on the distance to the base station etc) as the battery runs from full to empty, or does the output power decline gradually with the battery voltage? And if the PA maintains a constant power output for a given Vramp whether VBAT is high or low as I hope it does, what happens to the current draw? Is it akin to an LDO in that the higher the power supply voltage, the less efficient it becomes, or is it more like a switcher in that for a constant Vramp / constant power output level, the current drawn from VBAT goes down as the voltage goes up? One of the purposes of the board which I am currently building is to serve as a platform for experimentation, so I can find some answers to my questions by trial and error. I am not putting any regulators at all, neither LDO nor switchers, into my design, and instead my plan is to simply bring the VBAT power net to a power input connector. Then connect a lab bench power supply, set it to different voltages in the range which the chip datasheets say is allowed, and observe the actual current draw and the RF power output level. 5.5 V is the upper limit of how high VBAT can go, i.e., the highest VBAT voltage these chips can tolerate per their datasheets. It will never actually go that high in a standard cellphone with a Li-ion battery (those top off at 4.2 V), but the chipset I'm working with is old; it was designed back in the days when the cellphone industry was making their gradual transition from NiMN batteries to Li-ion, and the chipset is designed to be able to work with both battery types. As I understand it, the chipset must be able to tolerate VBAT going as high as 5.5 V briefly because a 3-cell NiMH battery can get that high (again, briefly) toward the end of its constant-current charging process. Oh, and the 2.5 A figure came from the datasheet for a different PA, not the one I'll be using, but presumably no different in the fundamentals of how these things work: ftp://ftp.freecalypso.org/pub/GSM/PA/SKY77324.pdf See Table 2 (Recommended Operating Conditions) on page 2. But see how the maximum current draw is stated in a roundabout way - the datasheet effectively says "we recommend that you keep Icc under 2.5 A", but it does not explain how this current draw varies with the supplied voltages (VBAT and Vramp/APC), and there is no explanation as to how much current or power draw one should expect when putting out the Tx signal power level the GSM specs call for (the highest one). Kai-Martin Knaak wrote: > Hi Spacefalcon. Nice to see you on this list. I got to know you from > the openmoko mailing list. I agree with much of your diagnosis why > openmoko was so underhelming. Would put in a less radical way, though. > I hope your dumb phone project advances. If it actually delivers, I=20 > may be interested in a copy. Hehe, nice to hear. What I'm building right now is not a complete phone though, only the first preliminary step: a Calypso GSM development board seeking to accomplish the following objectives: * Capture a Calypso core modem design in a free EDA format so it can be used as a foundation by subsequent OSHW projects, whether my own or someone else's; * See if we can actually build a quadband Calypso modem using the Epcos M034F RF front end module which TI apparently used on their reference boards, but which no commercial phone or modem manufacturer ever did in the days of Calypso; * Provide a platform for experimentation so that my currently unanswered questions about various odd quirks of the chipset (like the PA power supply voltage and current mystery) can be answered empirically; * Provide a convenient platform for firmware development (with all necessary debug features like JTAG) that can run both the TCS211 reference fw (which currently can only run on Openmoko modems which lack JTAG access) and the fledging FreeCalypso fw, so that the latter can be debugged and made to work like the former. The future Free Dumb Phone will indeed be based on the foundation I'm laying with this Calypso GSM development board, but I will need to first build the dev board and then use that dev board to whip our FreeCalypso firmware into shape before it will make sense to build a complete phone - without working and usable firmware, that phone would be a very expensive paperweight. But I'm straying too far off-topic here; anyone interested, check out www.freecalypso.org - a link to the FreeCalypso mailing list is at the bottom of the home page. > > I am building > > a board based on a cellphone chipset, and the power management chip > > has a PWON pin that needs to be connected to GND through a > > pushbutton switch for power-on control. > > Just to be sure: Only a short connection to GND is required, is it. Look at the keypad of a traditional non-smart cellphone. See the red button which you press to turn it on and off and to end calls? That button is wired between the Iota chip's PWON pin and GND. In hardware terms, if PWON goes low (it is pulled up to VBAT inside the Iota power mgmt chip) while the mobile is switched off, the PMU performs its power-on sequence and boots the ARM CPU. The rest is up to the firmware. Standard firmwares implement a guard logic: before booting all the way, they check to see if the power-on button is still pressed for a certain time period, and execute the firmware-driven power-off sequence otherwise. This way a powered-off phone sitting in someone's pocket or purse won't power up on its own from an accidental momentary press of the button, which does cause a hardware power-on and boot sequence. The hold-down-to-power-off function of this same button is implemented purely in the firmware, and so is the end-call function. > If it needs to be a permanent connection, I'd go for one of these switche= > s: > http://www.tme.eu/en/details/esp1010/slide-switches/ece/=20 Having the power button effectively pressed down forever is most certainly not a normal condition in a standard cellphone, but I would like to see how the chipset would react to it: for example, will this condition prevent it from going into sleep modes? Therefore, I plan on wiring a two-pin header (allowing for a shorting jumper) in parallel with the pushbutton switch, just to facilitate such experiments. It's a development board after all. > If it is just short bursts, I wouldn't worry too much. Each GSM TDMA frame is 4.615 ms, and is divided into 8 timeslots. When you are in a call, the mobile has a dedicated timeslot assigned to it, and transmits for 1/8 of a frame every frame, i.e., 12.5% duty cycle. But in GPRS mode the mobile can have up to 4 timeslots allocated to it, i.e., 50% duty cycle. SF