X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type; bh=gZSa3o8KBUx2KtFb6sYsydfAOo5E9455Sr3Eow36fj8=; b=jVIMkvWKij9ItzP6LLqD/UqPxOlhFTq59S11K8mpWYGOWnUVMG9mza8lRKNB+Jl1zS x0avekXoT10VWAO2Fr5+fbnJQrCtMI1dSkZt5fOunIKSOCseGzYXaXRNxvrwFGIDnerk Sk1sRQD9/8bdCLcVAKbilPD1qsUJ8QzFcQbg5qSLlUIqRRfT72f1jaA3FqzWHYF3IEk1 8JJI9ERLLpYYvw3QgP/XEYvg54B8LShXIPH4UteqtA4Jd7cBMGpNkR82U/DSUgX7rD39 ewquFzMwPPAul11JBZCRS6HnZzMT11iHGnlJs1trHkIEynPbRYD4LVy+tQHl0kRt5tEX uh2Q== MIME-Version: 1.0 X-Received: by 10.107.19.21 with SMTP id b21mr1327408ioj.78.1436838329873; Mon, 13 Jul 2015 18:45:29 -0700 (PDT) In-Reply-To: References: <76520AC3-3E8D-4F80-A912-AB076DD8D0C6 AT icloud DOT com> <1670171546 DOT 913210 DOT 1436776811789 DOT JavaMail DOT yahoo AT mail DOT yahoo DOT com> <79456AAA-24A9-4300-900D-005ABBCFCBDA AT icloud DOT com> Date: Mon, 13 Jul 2015 18:45:29 -0700 Message-ID: Subject: Re: [geda-user] PCB interface (ECAD vs. MCAD) From: "Ouabache Designworks (z3qmtr45 AT gmail DOT com) [via geda-user AT delorie DOT com]" To: geda-user AT delorie DOT com Content-Type: multipart/alternative; boundary=001a113f648e407cf3051acbfef7 Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk --001a113f648e407cf3051acbfef7 Content-Type: text/plain; charset=UTF-8 On Mon, Jul 13, 2015 at 6:01 PM, Kai-Martin Knaak wrote: > Ouabache Designworks (z3qmtr45- > Re5JQEeQqe8AvxtiuMwx3w AT public DOT gmane DOT org) [via geda-user- > Ht4Cp5ncgjRBDgjK7y7TUQ AT public DOT gmane DOT org] wrote: > > > I'm > > surprised that no one has applied autorouting to schematic capture, > > That would really be usefull. > > Schematic capture serves two purposes. It is the way the electronics > designer tells the computer about the connections he needs in the > netlist. And it also is meant to present the topology of the circuit > to the human eye as comprehensibly as possible. A readable schematic > asks for much more than "connect all these pins with lines". > > An auto router needs to be told which pins to connect. In other words, > it needs a netlist. But it is the main purpose of schematic capture to > create a netlist in the first place. > > ---<)kaimartin(>--- > Nothing is worse than a completely machine generated schematic. It's nothing more than a graphical netlist. But you could start by reading in a netlist to get all the components and connections and then use a ratsnest to figure out the best component placements while still maintaining all the connections. Once you have a placement that minimizes net lengths and represents major signal flow you can use the autorouter to make all the nets nicely spaced and orthonginal. If not perfect then hand tweek from there. You do need a graphics engine that gives you a choice of quality fonts,sizes and spacing for publication. This is where the IC world screwed up. 20 Years ago we designed IC's using schematic capture but our chips were growing so fast that you couldn't lay down gates fast enough to meet schedule. This led to the shift from Schematics to HDLs. The problem was that only the leaf level component designers were having a problem. The architects were fine because they were doing the top levels that interconnected the leaf levels and were happy with schematics. They liked to design with block diagrams and used schematics for that purpose. When they had to switch over to hdls they started using tools like visio for their diagrams and these were not linked to the actual connectivity. We need to create a schematic capture tool that can read/write netlists. This could spur a return of ic architects using our tool for block diagrams. John Eaton --001a113f648e407cf3051acbfef7 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable


On Mon, Jul 13, 2015 at 6:01 PM, Kai-Martin Knaak <= ;kmk AT familieknaak.= de> wrote:
Ouabache Designw= orks (z3qmtr45-
Re5JQEeQqe8Avxti= uMwx3w AT public DOT gmane DOT org) [via geda-user-
Ht4Cp5ncgjRBDgjK7y7TUQ AT public DOT gmane DOT org] wrote:

> I'm
> surprised that no one has applied autorouting to schematic capture, > That would really be usefull.

Schematic capture serves two purposes. It is the way the electronics=
designer tells the computer about the connections he needs in the
netlist. And it also is meant to present the topology of the circuit
to the human eye as comprehensibly as possible. A readable schematic
asks for much more than "connect all these pins with lines".

An auto router needs to be told which pins to connect. In other words,
it needs a netlist. But it is the main purpose of schematic capture to
create a netlist in the first place.

---<)kaimartin(>---

Nothing is wo= rse than a completely machine generated schematic. It's nothing more th= an a graphical netlist. But you could start by reading in a netlist to get = all the components and connections and then use a ratsnest to figure out th= e best component placements while still maintaining all the connections. On= ce you have a placement that minimizes net lengths and represents major sig= nal flow you can use the autorouter to make all the nets nicely spaced and = orthonginal. If not perfect then hand tweek from there.

Y= ou do need a graphics engine that gives you a choice of quality fonts,sizes= and spacing for publication.

This is where the IC world = screwed up. 20 Years ago we designed IC's using schematic capture but o= ur chips were growing so fast that you couldn't lay down gates fast eno= ugh to meet schedule. This led to the shift from Schematics to HDLs. The pr= oblem was that only the leaf level component designers were having a proble= m. The architects were fine because they were doing the top levels that int= erconnected the leaf levels and were happy with schematics. They liked to d= esign with block diagrams and used schematics for that purpose. When they h= ad to switch over to hdls they started using tools like visio for their dia= grams and these were not linked to the actual connectivity.

We need to create a schematic capture tool that can read/write netlists.= This could spur a return of ic architects using our tool for block diagram= s.

John Eaton



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