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Date: Thu, 9 Jul 2015 17:27:17 -0400
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From: DJ Delorie <dj AT delorie DOT com>
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In-reply-to: <6392CE1A-AFA0-4D62-979C-3F35786422BD@noqsi.com> (message from
	John Doty on Thu, 9 Jul 2015 14:37:00 -0600)
Subject: Re: [geda-user] Back annotation
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> #3 is certainly growing on me. I find myself dealing with multiple
> layout contractors, and one of them wants footprint names like
> "BGA484C100P22X22_2300X2300X260". I don't think those belong in the
> schematics, and the others are happy with "BGA484". So, it's a
> flow-dependent mapping.

That idea was a side-effect of my "component database" blue-sky.  We really
want *three* main tools:

* schematic capture (gschem)
* mapping to a backend (netlister + component_db + project_ruleset)
* backend (pcb/sim/etc)

The mapping would map symbolic information (pins A,B,Y, value, etc) to
physical information (package-specific pinouts, simulation models,
etc) based on whatever relevent local rules apply.  Most of this info
is what's back-annotated anyway, but the backend can provide its
as-built data to the netlister on the fly, to merge with new schematic
info.

It's also a solution to the transistor problem, because the
information that's moved out of the schematic is the same information
that causes the problem in the first place.

And by swapping the db/rules you get to target different backends with
the same schematics.

One of the "backends" could be an annotated as-built schematic set too :-)

/me wonders how this will work with heriarchical "symbols" feeding
ruleset attributes to subcircuits...