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Subject: Re: [geda-user] Back annotation
From: John Doty <jpd AT noqsi DOT com>
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Date: Thu, 9 Jul 2015 14:37:00 -0600
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On Jul 9, 2015, at 12:43 PM, DJ Delorie <dj AT delorie DOT com> wrote:

> 3. Moving as-built data out of the schematic so that back-annotation
>   isn't needed.  PCB would have to provide as-built info to the
>   netlister, which would integrate that with the schematic info to
>   build a new netlist.  We'd still need a #2-type tool though.
> 
> (personally, I like #3, and I think it would be a better way to enable
> pin/gate swapping in heirarchical schematics, but of course it's the
> hardest to implement)

#3 is certainly growing on me. I find myself dealing with multiple layout contractors, and one of them wants footprint names like “BGA484C100P22X22_2300X2300X260”. I don’t think those belong in the schematics, and the others are happy with “BGA484”. So, it’s a flow-dependent mapping.

I’ve also been designing things that have multiple copies of the same circuit topology, but with different component values in the different copies. It would be nice to have this flow from one set of graphics rather than a copy for each set of values.

John Doty              Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd AT noqsi DOT com