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From: karl AT aspodata DOT se
To: geda-user AT delorie DOT com
Subject: Re: [geda-user] work on gEDA
In-reply-to: <20150215130006.4258b4c3@jive>
References: <20150215021721 DOT 28d94fde AT jive> <20150215092144 DOT EF6D381A5EB8 AT turkos DOT aspodata DOT se> <20150215130006 DOT 4258b4c3 AT jive>
Comments: In-reply-to Lev <leventelist AT gmail DOT com>
   message dated "Sun, 15 Feb 2015 13:00:06 +0100."
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Message-Id: <20150215163638.B344081A5EBB@turkos.aspodata.se>
Date: Sun, 15 Feb 2015 17:36:38 +0100 (CET)
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Levente:
> On Sun, 15 Feb 2015 10:21:44 +0100 (CET)
> karl AT aspodata DOT se wrote:
> > Be able to have the silk (or rather, the component outline) be able
> > to stick outside of the pcb area, would be useful for connectors,
> > switches, and such.
> That's already implemented. Just define the size of your drawing are in
> PCB's settings. Draw your real PCB outline on a layer called 'outline'.
...

What I have done to date, is to use a too big pcb size, and have a
fp for the mechanical outline (in silk, I make the boards myself)
of the pcb, like in:

 http://turkos.aspodata.se/git/openhw/share/pcb/_mechanical/bopla_euromas_210.fp

Then I also see where screw holes and other rstrictions are.

Perhaps that is a good enought solution?

Regards,
/Karl Hammar

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