X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-Virus-Scanned: amavisd-new at cloud9.net Date: Sat, 26 Oct 2013 16:24:15 -0400 (EDT) From: Stuart Brorson To: geda-user AT delorie DOT com Subject: Re: [geda-user] Power to ICs with numslots > 1 In-Reply-To: Message-ID: References: <201310261908 DOT r9QJ8Vv8025803 AT envy DOT delorie DOT com> <526C1AF1 DOT 8000107 AT sbcglobal DOT net> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk I'll second what DJ said, and add a little info to it. For very simple parts with no decoupling (think 74XX series logic and its descendents), it's fine to set the net=GND and net=VCC attributes in the symbol. The netlister will pick up the nets. Then, if you want to add a decoupling cap, put the cap next to the part and add netnames to the nets attached to the cap. However, make sure you review each part's attributes to make sure that you have indeed attached power/GND nets -- i.e. you haven't forgotten them! It may help to make these attributes visible on the schematic to achieve this purpose. For larger, more complicated parts (i.e. with lots of power/GND pins), I think it's better to have a separate schematic symbol for the chip power pins with all the power/GND pins attached to the symbol. Then you can tie them to power/GND as you see fit, and add decoupling caps, chokes, etc. as necessary to the symbol. This is important for parts which call out complicated bypassing/decoupling schemes. Meanwhile, have a separate symbol (with the same refdes) elsewhere in the schematic with all the logic pins or other component functionality attached to pins. FWIW, I use a lot of Altium these days, and this is also what is done with that tool. Stuart On Sun, 27 Oct 2013, James Jackson wrote: > DJ, > > Thanks - I had a suspicion this was the way to go, but good to get > confirmation. Girvin: I've implemented this method in my schematic, but > haven't seen what the netlister / PCB layout software makes of it yet. It > certainly unclutters the schematic though. > > Yours, > James. > > > On Sun, Oct 27, 2013 at 12:11 AM, Girvin Herr wrote: > >> DJ, >> I have seen this done on production schematics. However, I am not sure >> they were "intelligent", just documentation. >> Does this separate symbol method replace the net=GND:n and net=+5V:n etc. >> symbol attributes or are they still needed in the symbol? >> The two methods sound redundant. Using the symbol attributes "hardwires" >> the net name, but the separate power and ground symbols allow netnames >> other than what otherwise would be specified in the symbol. I like that >> versatility. >> >> Girvin Herr >> >> >> >> >> On 10/26/2013 12:08 PM, DJ Delorie wrote: >> >>> Typically, you'd have a separate symbol that had *only* the two power >>> pins, and the same refdes. The netlister will merge those pins with >>> the slotted pins when the schematic is exported. >>> >>> >> >