X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type:x-gm-message-state; bh=eAkHAHtXRqKL671cErR4fYDsmD9f4bC4nj2avz+9TJk=; b=O3oD/cRpI00GgwNEXeLlif5aPZZBtqv638PTm1PhxMcXUE9UzmRM67P5fAUKfEmQN0 eWEQc0b/JJpYsjX7uUanjp4deJVBWZGYhJXkRWj2E3WlIZFEMEGVy9kKiPSI5FkDk3Yb j9xV+INS8TDonVs3OZsBWf3PuFPoioYqHRxpvP5kU+K+Hk/zULH7NMH7uMzSkTUAHDV9 BgVVWJP0e+QKpS9wZPgfZrQANoH803CUoJgZJ4/p0KHInwIkMz3kEjRZRlEKFXChEJiM b5rQ3kFfDJz7UkrkkNN/NnR4QIjBAmKNGnYhdwCVLx36t8weYPt30zLuIu9CRT5mv4lo ZiJw== MIME-Version: 1.0 X-Received: by 10.194.176.41 with SMTP id cf9mr9243105wjc.66.1374173218428; Thu, 18 Jul 2013 11:46:58 -0700 (PDT) In-Reply-To: References: Date: Thu, 18 Jul 2013 11:46:58 -0700 Message-ID: Subject: Re: [geda-user] PCB BGA (ball grid array) Package/Footprint From: Russell Dill To: geda-user AT delorie DOT com Content-Type: text/plain; charset=UTF-8 X-Gm-Message-State: ALoCoQnxVhpCICyxqEYtv87Y/rsKP1lkPMrtryrfHJ3Og9YhtC5IA2t/0nNTLRyrpQ3HsG5jRtZQ Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk On Thu, Jul 18, 2013 at 11:29 AM, Rob Butts wrote: > I'm not sure exactly what you mean here, > > I was thinking the pads would have a small detent the IC would settle into > but apparently no such luck. It would just make it easier to line up. The > people I have doing my assembly have a hard time as I imagine most people > do. Ah, manual placement, people generally put a silk border that is the same size as the BGA chip and that is used to visually line it up. For production using pick and place machines, talk to your assembly house, they'll recommend fiducial configurations. > On Thu, Jul 18, 2013 at 12:51 PM, Bob Paddock > wrote: >> >> > The other is applying a thin layer of >> > flux to the area of the BGA footprint. >> >> Make sure there is a clear path for water flow (cleaning fluids) for >> ingress and egress of the flux. >> >> Makes a difference in reliability of high impedance circuits and ultra >> low power circuits. >> >> "Make it smaller" does not always go well with "make it manufacturable" >> when >> hard to clean parts (BGA/QFN/LCC/LGA) are surrounded by things like >> bypass caps for example. :-( > >