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Date: Mon, 17 Dec 2012 13:15:51 -0500
From: Joshua Lansford <Joshua DOT Lansford AT laserlinc DOT com>
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To: geda-user AT delorie DOT com
Subject: Re: [geda-user] Find rat lines - summary
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Reply-To: geda-user AT delorie DOT com


> To me, currently it seems the best approach would be to use the 
> combination _and_ one of the minimal cut ideas in parallel. This would 
> allow the user to use tagging as much as (s)he finds reasonable, 
> between no tagging at all and tediously tagging every piece of copper 
> ever existed in the history of the board. Whenever tagging can reveal 
> a short, PCB should use that info and fall back on the minimal cut 
> otherwise.
>

+1.  I was just about to suggest this myself.

Everyplace that has been manually tagged can be added to the graph as a 
source as if there was a component pin with a net attribute at that 
point.  That way you can retroactively add tags to chase down a short 
being guided by the minimum cut or other heuristic, or add the tags as 
you go along if it fits your development cycle.  In the retroactive 
method, the heuristic would probably provide better and better guesses 
as you supplied it with more and more information by adding tags.
~Joshua