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Subject: Re: [geda-user] pcb fundamentals
From: Peter Clifton <pcjc2 AT cam DOT ac DOT uk>
To: geda-user AT delorie DOT com
Date: Sat, 15 Dec 2012 18:27:40 +0000
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On Sat, 2012-12-15 at 15:10 -0300, Felipe De la Puente Christen wrote:

> In fact, a PCB layout package has a lot in common with a subset of a
> geometric modeling package capabilities.


Yes, actually, there are some interesting parallels there. Most of our
geometry is planar though, which makes it easier for us. (Having spent a
lot of time working with PCB's polygon code, I am _glad_ I don't have to
do boolean geometry on 3D objects!)


> > You can model anything with that (including material properties). I
> > won't expect you can make everything you model, nor that it will help
> > you match up the netlist - but whatever... it is flexible.
> 
> It, of course, needs the "other" capabilities geometric modelers don't
> need. This electrically aware control layer is the piece of code that
> transforms the thin geometric modeler into a pcb layout program in my
> opinion.
> 
> I can see (abstracting myself from the emotional opinions from time to
> time) a valid point in John's approach. 


I actually want to head this way in the future, but doing so is hard.
There are no GPL compatible 3D kernels, and I am reliably informed that
writing one from scratch is "silly" and/or _HARD_.

For some work I'm doing at the moment, I may need to add support for
modelling router cuts (not necessarily full board thickness either).

My first thought was to introduce a primitive "board outline" sketch
loop, and allow footprints to contribute to that. (This wouldn't cater
for the non-full depth routes though), but by making the cut-extrude a
separate step (with a depth parameter), we start to get what looks like
a cut-down 3D modeller.

Regards,

-- 
Peter Clifton <peter DOT clifton AT clifton-electronics DOT co DOT uk>

Clifton Electronics
Peter Clifton <peter DOT clifton AT clifton-electronics DOT co DOT uk>

Clifton Electronics