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Date: Mon, 22 Oct 2012 10:28:25 -0400
From: Joshua Lansford <Joshua DOT Lansford AT laserlinc DOT com>
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To: geda-user AT delorie DOT com
Subject: Re: [geda-user] FPGA / CPLD development with Linux
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Sorry, correction on my suggestion, If you are planning on using a CPLD 
instead of a FPGA  then if you use Xilinx you will need ISE to 
synthesize your design instead of PlanAhead as PlanAhead has dropped 
support for CPLD's.  Both ISE and PlanAhead are in the free WebPack and 
run on Linux.
http://forums.xilinx.com/t5/Design-Planning/webPACK-12-3-PlanAhead-CPLD-Isim/td-p/115332
~Joshua

On Mon 22 Oct 2012 08:26:06 AM EDT, Joshua Lansford wrote:
> My experience has been with Xilinx.  Older wiser folks feel free to
> correct me if I am off on any of this. They have a free web-pack
> version of their development environment which runs on Linux.  The
> limitations of the web-pack are that you can't target the super large
> devices. However I know you can target up to the Spartan 6 LX75
> because that is the FPGA I am using.  And with each release of a new
> Webpack version it supports more then it did before.  You also can't
> use chipScope pro which lets you put a virtual oscope in your FPGA
> though the JTAG. Besides that I haven't felt much limitation due to
> the Webpack.  Even their simulator still works with the Webpack.  I am
> running their Webpack on Debian.   I would agree that I would stick to
> a textual design such as VHDL or Verilog.  If you are planning on
> using open source cores or tools I would suggest Verilog.   For
> example the open source PCI bridge and Ethernet MAC from opencores.org
> are in Verilog. (Do note that it is hard to satisfy the rebuilt write
> required by LGPL especially in ASIC so be aware of that before you
> head down that road...) Xilinx has a community forum where I have
> gotten very good support and advice on all sorts of topics related to
> FPGAs.  One more thing, Xilinx currently is in transition from one IDE
> to a new one.  So if you don't know either and you want to go with
> Xilinx, learn the PlanAhead IDE instead of the ISE IDE.
>   Synthesizing logic to physical layout of a FPGA is very specific to
> a particular company which made that chip and I don't know that there
> is any open source tool that can do that.
>
> ~Joshua
>