X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f X-Recipient: geda-user AT delorie DOT com Message-ID: <20121022000634.10554.qmail@stuge.se> Date: Mon, 22 Oct 2012 02:06:34 +0200 From: Peter Stuge To: gEDA users Subject: Re: [geda-user] FPGA / CPLD development with Linux Mail-Followup-To: gEDA users References: <1350863030 DOT 93187 DOT YahooMailNeo AT web121004 DOT mail DOT ne1 DOT yahoo DOT com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1350863030.93187.YahooMailNeo@web121004.mail.ne1.yahoo.com> Reply-To: geda-user AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: geda-user AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk David Collins wrote: > The most obvious issues seem to be: >  1. Will I be able to synthesize circuits for these devices using > Icarus Verilog?, and What does "these devices" mean? The question is completely open ended. Anyway, I suggest to look at the Icarus Verilog code and get in touch with that community, to find out what it can do as well as what it's limitations are. I would start out with the expectation that you need to use the vendor's toolchain however. >  2. Are there open-source tools for working with the Altera JTAG > USB-blaster? Several. urjtag is one, OpenOCD has an SVF player and can use the USB Blaster, and the jtagserver process used by the Linux version of Altera's Quartus toolchain (gigabytes of download wohoo!) while not open source might have it's IPC API documented (or discoverable easy enough). > Also, is there a particular FPGA or development kit you would > recommend? That depends completely on what your needs are for the FPGA application, in terms of IO standards, what hard components you require on the silicon, ie. CPU core, clocking, serdes, particular IO standards, IO voltages, number of IOs, and so on. > Would I be better off with a Xilinx device? If your purpose is learning then I would recommend that you try both. Personally I also like the Actel parts. They're more expensive per speed, and the toolchain GUI is a mess, but I like that they are live at power on. They also have some very small size and very low power parts. By now, Xilinx also have nonvolatile parts. But it's just as stupid to say "Xilinx is always the best choice" as it is to say "Python is always the best choice." > If anyone has experience developing for CPLDs with Linux, I am > interested in advice on that also. Again, how different they are, if at all, depends on what specific parts you look at. High end CPLDs will be similar to low end FPGAs. Start by choosing a project. Something simple. Choose parts from there. //Peter