X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f
X-Recipient: geda-user AT delorie DOT com
Subject: Re: [geda-user] gerber export - outline layer
From: Stefan Salewski <mail AT ssalewski DOT de>
To: geda-user AT delorie DOT com
In-Reply-To: <201207101614.q6AGEu2L008714@envy.delorie.com>
References:
	 <CACPio-4fO1Cku2=kT5jsRATZ68+HSvpXGHQsLjhzuix+msBivw AT mail DOT gmail DOT com>
	 <20120710062222 DOT 34c58d67 AT svelte>
	 <201207101614 DOT q6AGEu2L008714 AT envy DOT delorie DOT com>
Content-Type: text/plain; charset="us-ascii"
Date: Tue, 10 Jul 2012 18:35:48 +0200
Message-ID: <1341938148.2526.3.camel@AMD64X2.fritz.box>
Mime-Version: 1.0
X-Mailer: Evolution 2.32.3 
Content-Transfer-Encoding: 7bit
Reply-To: geda-user AT delorie DOT com
Errors-To: nobody AT delorie DOT com
X-Mailing-List: geda-user AT delorie DOT com
X-Unsubscribes-To: listserv AT delorie DOT com
Precedence: bulk

On Tue, 2012-07-10 at 12:14 -0400, DJ Delorie wrote:
> > Let's all pretend that these concepts are called "layers" and
> > "sublayers" to make it clear which is the fundamental one.
> 
> The lexicon refers to them as "drawing layers" and "physical layers".
> 
> That we have a hack for "outline" doesn't mean we should change the
> whole design philosophy.  We should just fix the hack.

Is the special meaning of the "outline" layer documented in the pcb
manual? I can remember discussions of this topic on this list, but not
in the manual.