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Date: Sat, 28 Apr 2012 15:44:11 +0200
From: Oliver Schinagl <oliver+list AT schinagl DOT nl>
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To: geda-user AT delorie DOT com
CC: Colin D Bennett <colin AT gibibit DOT com>
Subject: Re: [geda-user] Re: [coreboot] Dual SPI Flash adapter attempt 2.0
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On 04/27/12 19:50, Colin D Bennett wrote:
> On Fri, 27 Apr 2012 11:32:35 +0200
> Oliver Schinagl<oliver+list AT schinagl DOT nl>  wrote:
>
>> Wow, nice big review :D feedback!
>>
>> On 04/27/12 02:08, Peter Stuge wrote:
>>> Oliver Schinagl wrote:
>>>> So the big question is; shall I send this to seeed for
>>>> fabrication or does it need some big change?
>>>
>>> The RN has slivers of soldermask between pads. Avoid this; it's
>>> too thin to work at all in production and the component size is
>>> so small that you want to avoid any chance of soldermask
>>> getting in the way of soldering. Board production processes are
>>> not exact, they are messy mechanically and chemically, and you
>>> should never push your producer's limits. If their limit is 6
>>> never use less than 8.
>> That's just how the part comes. I haven't made or modified it. Is
>> there some way to increase soldermask spacing or better yet, so
>> set up some minimal with?
>
> To change the solder mask gap around pads:
>
> 1. Select the element by clicking it.
>
> 2. Make the 'solder mask' layer visible by clicking its swatch in
>     the layer palette. (This causes the 'changeclearsize' command to
>     operate on the solder mask openings instead of on polygon
>     clearance... an ugly hack, so be aware this command behaves
>     differently depending on whether 'solder mask' layer is visible.
>
> 3. Hit ':' and execute the command: changeclearsize(selected,0.1mil)
>     (this basically resets the mask opening size)
>
> 4. Execute the command: minmaskgap(selected,1.5mil)
>     (this will set the gap between copper and solder mask,
>     but only will enlarge the gap so you need step 3 first).
>
I tried that, but then the maskgap runs under the silk screen of the part.

So I would need to only increase the gap on the 'inside'.
> You can hover over the SMD pad and hit Ctrl+r to see the solder
> mask gap.
>
>> Their limit is 6, i've designed the board entirely using 8;
>> however the U3 part, the FET switch just comes in this size, or
>> smaller and would thus be impossible to use.
>>
>>>
>>> The SMD ICs and RN all have the package outline on silk
>>> absolutely tight around the soldermask apertures. Avoid this,
>>> again because the silk is way too close to the pads, and you
>>> never want silk anywhere outside the solder mask.
>
> Will the PCB fab house automatically remove silk from regions too
> close to holes in solder mask?  Laen's PCB fab does this, so I am
> sloppy and use silk screen tighter than is actually producible, for
> layout assistance (I wish pcb had some extra virtual layers in
> footprints like "placement courtyard", "keepout", etc. so we didn't
> have to abuse the silk screen for everything).
>
> Regards,
> Colin