On Tue, 12 Sep 2023 01:= 01 Cam (camfarnell AT bitflipper DOT c= a) [via geda-help AT delorie DOT com<= /a>], <geda-help AT delorie DOT com> wrote:

Hi Karl,

That python program is a quick-and-dirty hack that would take rather a lot = of work to bring it to a state suitable for sharing.

I've taken a brief look at pcb-rnd but the sparse documentation is disc= ouraging.

Cheers

Cam

On 2023-09-11 09:39, karl AT aspodata DOT se [via geda-help AT delorie DOT com] = wrote:
> Cam Farnell:
>> Well, having had no response here, I wrote a Python program which<= br> > ...
>
> Very nice, I did something similar but in perl as a perl module (kind<= br> > of a lib): http://aspodata.se/git/openhw/bin= /Pcb.pm
>
> You could possible help a fellow by publish your program as a lib.
>
>> But, given the silence here, I suppose the real message is that I<= br> >> should be using pcb-rnd instead.
>
> pcb-rnd should give you more options, and the real action have moved > there. The only downside with pcb-rnd is much bigger files, but in
> every other aspect it should be better.
>
>> On 2023-09-02 20:47, Cam (camfarnell AT bitflipper DOT ca) [via= geda-help AT delorie DOT com] wrote:
>>> I'm running PCB "version 4.2.2, Compiled on Mar=C2=A0= 9 2022 at 23:53:29" on an Ubuntu 22.04.3 LTS machine.
>>>
>>> After running the auto-router on my board, I get the following= messages:
>>>
>>> 692 rat lines remaining
>>> 692 of 692 nets successfully routed.
>>> Dropping via at (2272.50, 3587.50) mil because it's hole w= ould overlap with the via at (2272.50, 3572.50) mil
> ...
>>> Dropping via at (5757.50, 2996.50) mil because it's hole w= ould overlap with the via at (5757.50, 3011.50) mil
>>> Total added wire length =3D 41.38553 m, 2476 vias added
>>> Congratulations!!
>>> The layout is complete and has no shorted nets.
>>>
>>> Are these "dropping via" messages something I need t= o be concerned
>>> about? Missing vias would be bad. I couldn't find anything= in the
>>> manual about this.
>
> Well the message says that the router will not place vias at
> overlapping positions, which seems to be a good thing.
>
> Since you got a "The layout is complete and has no shorted nets.&= quot;
> there will not be any missing connections, it says all things are
> connected and there are no shorts. Finish this off by doing a drc
> to make sure that this is manufacturable.
>
> Regards,
> /Karl Hammar
>
>