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Date: Fri, 11 Dec 2020 16:42:18 +0100 (CET)
From: Roland Lutz <rlutz AT hedmen DOT org>
To: "Klaus Rudolph (lts-rudolph AT gmx DOT de) [via geda-help AT delorie DOT com]" <geda-help AT delorie DOT com>
Subject: Re: [geda-help] using net names on multiple sub schematics used by
 single symbol
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Hi Klaus,

On Fri, 11 Dec 2020, Klaus Rudolph (lts-rudolph AT gmx DOT de) [via 
geda-help AT delorie DOT com] wrote:
> I have a general problem of understanding the syntax for nets and net
> attributes.
>
> Somewhere we see that "net=xyz:1" defines a line on a bus which is names 
> xyz and this is the line number 1 on that bus.

"buses", as per gEDA terminology, are multiple nets which are grouped into 
one thicker line.  At the moment, gEDA/gaf ignores buses (I proposed a 
patch which would change that a while ago but haven't merged it due to, 
ironically, a controversy about which pin syntax to use), so you have to 
use "bus rippers" in order to emulate bus behavior with net= attributes.

Colons are a typical field separator, and bus pin numbers are also 
sometimes indicated using a colon.  That said, in the context of gEDA/gaf 
and, more specifically, the net= attribute, the part behind the colon is 
(always) a list of pinnumbers in the symbol which should be internally 
connected to the net named before the colon.

> Per definition all and everything is a bus and not a net.

Buses and nets are separate concepts; most of the time, you are dealing 
with nets.

> If we now take a look on symbols which are used in connection with the 
> "source=sub.sch" to use sub schematics, the symbol can take also 
> attributes "net=xyz:1"

Yes, that's kind of a hack, but I see why people would use it.  If it 
scares you, don't do it.  I prefer the more explicit way of using a port 
symbol to connect to a subschematic, and connecting the net the usual way.

> where now xyz is a busname which line defaults to 1

There's no default set of pin numbers for the net= attribute.

> Than I learned that I use portname=xyz instead of refdes=xyz. OK, that
> sounds better, as refdes should be refdes and not a net connection. OK!
> But the wiki and other documentation did not know about and only
> describes the refdes=xyz attribute. That is very bad!

That's still valid, but I agree that it would be a good idea to update 
these resources to use the newer convention.

> Next problem I see is, that there is simple way for connections between
> different levels of hierarchy for sub/master schematics. It is a typical
> use case that we have at minimum the power rails connected between the
> hierarchy, but there is no way to make such nets "global" while other
> nets are local to their hierarchy level.

The problem here is that you want to do two conflicting things at the same 
time: on the one hand, separate subschematics from the embedding schematic 
by using different refdes/netname namespaces, and on the other hand, have 
things implicitly connected.  gEDA/gaf allows you very precise control 
over *how* these namespaces are separated; how you use that to achieve 
your goals is up to you.

I prefer using completely separated namespaces (all three of refdes=, 
netname=, and net= mangling enabled) and connecting things explicitly, 
i.e., having a "GND" and a "Vdd" port and connect these to power symbols 
both on the embedding schematic and the subschematic.  This way, I know 
there are no implicit connections which are not visible in the schematic.

If you prefer to have implicit connections, you basically have two 
options: disable net= mangling and have all implicit pins connect to 
top-level nets (e.g., net=GND:1 always connects to the global GND), or 
disable netname= mangling and have all netname= attributes connect to 
global nets (which connects your virtual power pins inside the subsheet 
but allows you to explicitly connect nets via e.g. netname=GND).

> In connection with my points above, I dislike the "netname" attribute,
> as it also breaks the naming conventions for "is a line on a bus".

Isn't it the reverse?  If I understand you correctly, you are unhappy 
about the syntax of net= attributes being too similar to the bus syntax 
used in other places; using the netname= would avoid that ambiguity.

> In addition, a symbol which is used for hierarchical designs ( contains
> source= attribute), can have something like:
> connect=<netname_here>:<netname in subschem>

That should be doable, even though it's way too implicit for my taste.

> If now net and bus has a given defined syntax, all the above could also
> be used to directly connect a bus to a sub schematic which is currently
> impossible.

Buses are currently purely decorative; connecting them to anything doesn't 
have an effect.

Roland