X-Authentication-Warning: delorie.com: mail set sender to geda-help-bounces using -f X-Recipient: geda-help AT delorie DOT com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:from:date:message-id:subject:to:content-type; bh=oG87fLltWSUoq4+RROw+VXubIVLXUZnR05BKgsYIJ1k=; b=PnINjzeLZkN9ccws4bklAbE/YV23asvJ9jar1WlI0C1dm7dQ8jfDR+kci+C3XE95Rj SwpN9bC/hXvr6MP0ax2PsfoBoZJr+W5NgrZcg/7Mx7udDoFoZa3wVO/QJao3Gq/cadQK k/RyZK30PdFUB7gh6jjHP+djpdmpC+lnlnMXdmXpVV5ect4ZZCvkdZd9dhBYSJ5k0rhK gLIiThzD1lXh4I/Z34bmufnE3edU3x5MmFADAvQGrWslIaPJtRWkydotR/L0LiwOv2a2 /ikmhVkenWq0XFykOQGnJ13EJRXNa6SnRXurc/BuOkhpaxRzoPg7CrkTix15CMF+wSwA jNVA== X-Received: by 10.182.138.105 with SMTP id qp9mr20473743obb.6.1416165690350; Sun, 16 Nov 2014 11:21:30 -0800 (PST) MIME-Version: 1.0 From: Mike Bushroe Date: Sun, 16 Nov 2014 12:21:00 -0700 Message-ID: Subject: [geda-help] Hierarchical Sheets sharing slots on a single chip To: geda-help AT delorie DOT com Content-Type: multipart/alternative; boundary=e89a8ff1cde8eaa1fc0507fec48c Reply-To: geda-help AT delorie DOT com --e89a8ff1cde8eaa1fc0507fec48c Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable gschem 1.8.2 (g875406c) gsch2pcb 1.6 xgsch2pcb 0.1.3 pcb version 20140316 Compiled on Aug 29 2014 at 07:56:58 Ubuntu 14.10 (just up from 10.04 through 12.04) Toshiba 5.7GiB Core 2 Duo 2.2GHzx2 64bit I am trying to make a single phase to 3 phase inverter. There is a wonderful chip that seems to made exactly for this purpose. It has 3 slots, one for each phase. However, the power conditioning on the chip only needs to be done once, and the inputs have to be level shifted with opto-isolators so that is a lot of 'per-channel' "stuf" between the control circuitry and the 3phase driver, and then *lots* more stuff on the output side with the high and low N-channel MOSFETS, back EMF diodes, caps, dummy load resistors, analog reference voltage, and leg active LED. So the slot for each leg of the 3phase has lots of distinct components for each leg to go in the sub-schematic page, but it wants to make 4 separate footprtints for the single device with one per phase plus one for the main sheet. Is there a way yet to have the actual foot print and power connections instance of the chip be on the top page, and then some way to tell each instance of the sub-schematic which slot to use internally? Currently the symbol for a slotted part is just a template for each instance of the slot with the power, chip select, etc pins being hidden. Is there some way, or plans to add a way to have an extra slot defenition that would not show the signal pins but would show the power and other pins? Using the current symbol build process (using gschem, but probably comparable ways scritps) to put both power and signal pins in the symbol "template", then have 'p' or '0' slot that listed only the power pins and the remaining slots list just the I/O pins and then gschem would only display the portion of the symbol 'template' that was needed for the current slot type. Allowing different patterns of special pins for special slots would probably open up other special devices for similar separation of repeated slot usages from single power, chip select, level-shift or other special controls. Being able to control which instance of a sub-schematic used which slot of a multi-slot device would allow 4 sub-sections to use only 1 slot each of a quad logic gate instead of using a whole chip per instance. Once again there is probably already a way to do this that I just haven't found yet. If someone could point me to the right section of the proper webpage I will go back to studying the tutorials and manuals to try and fix what I have. Thanks again for all the help. --=20 "Creativity is intelligence having fun." =E2=80=94 Albert Einstein --e89a8ff1cde8eaa1fc0507fec48c Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable

gschem 1.8.2 (g875406c)
gsc= h2pcb 1.6
xgsch2pcb 0.1.3
pcb version 20140316 Compiled on Aug 29 201= 4 at 07:56:58
Ubuntu 14.10 (just up from 10.04 through 12.04)
Toshiba= 5.7GiB Core 2 Duo 2.2GHzx2 64bit

I am trying to make a single phase to 3 phase inverter. There is a=20 wonderful chip that seems to made exactly for this purpose. It has 3=20 slots, one for each phase. However, the power conditioning on the chip=20 only needs to be done once, and the inputs have to be level shifted with opto-isolators so that is a lot of 'per-channel' "stuf" = between the=20 control circuitry and the 3phase driver, and then lots more stuff on the output side with the high and low N-channel MOSFETS, back EMF=20 diodes, caps, dummy load resistors, analog reference voltage, and leg=20 active LED. So the slot for each leg of the 3phase has lots of distinct=20 components for each leg to go in the sub-schematic page, but it wants to make 4 separate footprtints for the single device with one per phase=20 plus one for the main sheet. Is there a way yet to have the actual foot=20 print and power connections=C2=A0 instance of the chip be on the top page,= =20 and then some way to tell each instance of the sub-schematic which slot=20 to use internally?

=C2=A0 Currently the symbol for a slotted part is= =20 just a template for each instance of the slot with the power, chip=20 select, etc pins being hidden. Is there some way, or plans to add a way=20 to have an extra slot defenition that would not show the signal pins but would show the power and other pins? Using the current symbol build=20 process (using gschem, but probably comparable ways scritps) to put both power and signal pins in the symbol "template", then have 'p= ' or '0'=20 slot that listed only the power pins and the remaining slots list just=20 the I/O pins and then gschem would only display the portion of the=20 symbol 'template' that was needed for the current slot type.
Allowing different patterns of special pins for special slots would probably=20 open up other special devices for similar separation of repeated slot=20 usages from single power, chip select, level-shift or other special=20 controls.=C2=A0 Being able to control which instance of a sub-schematic use= d=20 which slot of a multi-slot device would allow 4 sub-sections to use only 1 slot each of a quad logic gate instead of using a whole chip per=20 instance.

Once again there is probably already a way to do=20 this that I just haven't found yet. If someone could point me to the=20 right section of the proper webpage I will go back to studying the=20 tutorials and manuals to try and fix what I have. Thanks again for all=20 the help.
--
"Creativity is in= telligence having fun." =E2=80=94 Albert Einstein
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