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        Wed, 25 Jun 2014 06:11:24 -0700 (PDT)
From: James Battat <jbattat AT wellesley DOT edu>
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Subject: [geda-help] Simulating logic circuits
Date: Wed, 25 Jun 2014 09:11:22 -0400
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To: geda-help AT delorie DOT com
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Reply-To: geda-help AT delorie DOT com

Hi folks,

I'm a new user of gEDA and have successfully run some simulations of analog circuits with gschem --> gnetlist --> ngspice.
I was looking online for tutorials about simulating logic circuits (e.g. a 4-bit counter) with gEDA, but did not find any.  My goal is to generate timing diagrams that account for propagation delays in the individual chips (flip-flops and and/or gates in this case).  

Is this possible?  

According to the following thread, in 2001 it was not possible to run logic simulations in gEDA:
  http://archives.seul.org/geda/user/Sep-2001/msg00001.html

If someone has an example of running a logic simulation (e.g. flip-flops clocked by an oscillator) that would be greatly appreciated.

If it's not possible to do this in gEDA, could you recommend free tools that do this?

Thanks,
James