From: Jason Green <news AT jgreen4 DOT fsnet DOT co DOT uk>
Newsgroups: comp.os.msdos.djgpp
Subject: Re: Make file wildcards
Date: Sat, 24 Jun 2000 13:48:48 +0100
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To: djgpp AT delorie DOT com
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"Eli Zaretskii" <eliz AT is DOT elta DOT co DOT il> wrote:

> > > > This is expected behavior.  As written, the implicit rule you used
> > > > is just another implicit rule, not unlike the one that Make already
> > > > knows about.  When Make sees more than one implicit rule to build the
> > > > same target, it chooses the first one, which will always be the one
> > > > that's built into Make.
> > 
> > Do you really mean that?  I don't follow.  Normally if you redefine a
> > rule it should overide the built in rule.
> 
> Implicit rule is not a rule, in the sense you mean above.
> 
> A Makefile can legitimately have several different implicit rules for
> the same %.o pattern, and they are all valid.  Make will chose
> whatever it sees fit out of them.

Sorry, I still don't get it.  I understand your original reply to mean
that there are cases where a built-in implicit rule takes precedence
over an implicit rule defined in the makefile.  Can you give an
example of this (if you really mean that)?

The original makefile did not contain a rule (implicit or otherwise)
to compile a .cpp file, that is why the built-in rule was invoked.
The corrections I posted will override the built-in rule.