From: Jason Green <news AT jgreen4 DOT fsnet DOT co DOT uk>
Newsgroups: comp.os.msdos.djgpp
Subject: Re: Make file wildcards
Date: Fri, 23 Jun 2000 23:56:28 +0100
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Wesel <nospam AT pacbell DOT net> wrote:

> Eli Zaretskii wrote:
> > 
> > > I built my makefile as follows:
> > >
> > > --------------------------------------------------------
> > > CC = gcc

CC = gpp
(or you won't link with the C++ library)

> > > CFLAGS = -g
> > > OBJECTS = test.o
> > >
> > > main.exe : $(OBJECTS)
> > >       $(CC) $(CFLAGS) $(OBJECTS) -o main.exe
> > >
> > > %.o : %.c %.cpp %.h
> > >       $(CC) $(CFLAGS) -c $<

This would work if you used separate rules:

%.o : %.c %.h
	$(CC) $(CFLAGS) -c $<
%.o : %.cpp %.h
	$(CC) $(CFLAGS) -c $<

> > > what I saw was
> > >
> > > --------------------------------------------------------
> > > make -k
> > > gpp    -c -o test.o test.cpp
> > > gcc -g test.o -o main.exe
> > 
> > This is expected behavior.  As written, the implicit rule you used
> > is just another implicit rule, not unlike the one that Make already
> > knows about.  When Make sees more than one implicit rule to build the
> > same target, it chooses the first one, which will always be the one
> > that's built into Make.

Do you really mean that?  I don't follow.  Normally if you redefine a
rule it should overide the built in rule.  

> > Lesson no.1: do not use implicit rules if Make already has a built-in
> > rule for that case.  Instead, tailor the existing implicit rule to
> > your need by changing the variables used by that rule, such as CC,
> > CXX, CXXFLAGS, etc.
> 
> I tried using the built in rules, and it worked!  My problem before was
> compiling a .cpp file but only modifying the CFLAGS variable.  CPPFLAGS
> put the proper debugging flags in.

CPPFLAGS is for the pre-processor options.
CXXFLAGS is the C++ equivalent to CFLAGS.
CXX is the C++ equivalent to CC (but these are already set by make)

Other macros of interest:
LDFLAGS for setting linker options.
LDLIBS for setting libraries to link with.

`info make cat' tells more.

You can set the macros as environment variables too, and make will use
them if they are not defined in the makefile.  But IMHO this is more
trouble than it is worth.