From: Peter Danielsson <e96pd AT efd DOT lth DOT se>
Newsgroups: comp.os.msdos.djgpp
Subject: Re: DPMI memory allocation 2
Date: Thu, 04 Nov 1999 01:41:30 +0100
Organization: Student
Lines: 178
Message-ID: <3820D63A.DF56714C@efd.lth.se>
References: <3821E566 DOT 15FB AT radar DOT mcgill DOT ca> <3821FDFA DOT 59E2 AT radar DOT mcgill DOT ca> <3820D5DE DOT F8CC1C77 AT efd DOT lth DOT se>
NNTP-Posting-Host: dialin-45-25.student.lu.se
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
X-Mailer: Mozilla 4.6 [en] (Win98; I)
X-Accept-Language: en
To: djgpp AT delorie DOT com
DJ-Gateway: from newsgroup comp.os.msdos.djgpp
Reply-To: djgpp AT delorie DOT com

Try to disable the interupt while writing.

Peter Danielsson wrote:

> Perheps your interupt function try to change the memory while writing to disk. This may cause problem.
>
> /Peter
>
> Frederic Cazenave wrote:
>
> > Hi,
> >
> > In fact I have cornered more my problem :
> > The problen is beetween the interrupt and the write.
> > The two parts work fine separately but most of the
> > time when I try to write while some interrupts are
> > treated my system crashes.
> > I give you the code of my interrupt. If someone could
> > show me the problem ...
> >
> > iqbuff is created by a malloc on 90% off the free
> > pages of my system.
> >
> > Thanks
> >
> > FRed
> >
> > --
> >  _________________________________________________________
> > |                                                          |
> > |               Frederic CAZENAVE                          |
> > |    _/\_  /^=  McGill Radar                               |
> > | \_/    \//    Box 198, MacDonald College                 |
> > |   | /-\ |     Ste Anne de Bellevue                       |
> > |   ||   ||     Quebec, Canada   H9X 3V9                   |
> > |               Tel (514) 398 7733 fax (514) 398 7755      |
> > |               mailto:Frederic DOT Cazenave AT hmg DOT inpg DOT fr       |
> > |               http://www.mpl.orstom.fr/hydrologie/catch/ |
> > |__________________________________________________________|
> >
> >   ------------------------------------------------------------------------
> > #include        <stdio.h>
> > #include        <ctype.h>
> > #include        <string.h>
> >
> > #include        <go32.h>
> > #include        <dpmi.h>
> >
> > #include        "..\include\globals.h"
> >
> > #define LOCK_VAR(x) _go32_dpmi_lock_code((void *)&x,(long)sizeof(x));
> > #define NHITS  7
> >
> > extern int pos_prod;
> >
> > typedef struct tabiq {
> >         float IQ[2][1024*NHITS];
> > } TABIQ;
> >
> > extern TABIQ * buffiq;
> > extern int numhits;
> >
> > int     Intnum;
> > static   int    * gates;
> > static   int    * flag;
> > static   PIRAQ  *diraq;
> > static   int    * xstart;
> > static   int    * xstop;
> >
> > static int *Ack;
> >
> > unsigned short Reg_base;
> >
> > void piraq_int_off(void);
> > void piraq_int_on(CONFIG * config, PIRAQ * piraq);
> > void piraq_isr(void);
> > static void IntDirac (void);
> > static void End_IntDirac(void);
> >
> > int     Irqmask;
> >
> > /* declare an arrays for the info on all the interrupts */
> > _go32_dpmi_seginfo      Piraq_isr;
> >
> > void piraq_int_off(void)
> >    {
> >    int  intnum;
> >
> >    if(Intnum < 8)
> >       outp(0x21,inp(0x21)|Irqmask);        /* clear master PIC */
> >    else
> >       outp(0xA1,inp(0xA1)|Irqmask);        /* clear slave PIC */
> >
> >    _go32_dpmi_free_iret_wrapper(&Piraq_isr);
> >    }
> >
> > static  int     Firstime=1;
> > void piraq_int_on(CONFIG * config, PIRAQ * piraq)
> >    {
> >    if(Firstime) /* register the cleanup routine */
> >       {
> >       Firstime = 0;
> >       atexit(piraq_int_off);
> >       }
> >    Ack = (int *)config->intack;
> >    diraq = piraq;
> >    flag = (int *) piraq->flag;
> >    gates = &config->gates;
> >    xstart = &config->first_g;
> >    xstop = &config->last_g;
> >    _go32_dpmi_lock_code(IntDirac,(unsigned long)(IntDirac - End_IntDirac));
> >    _go32_dpmi_lock_data(&Intnum,sizeof(int));
> >    _go32_dpmi_lock_data(&pos_prod,sizeof(int));
> >    _go32_dpmi_lock_data(diraq,sizeof(PIRAQ));
> >    _go32_dpmi_lock_data(gates,sizeof(int));
> >    _go32_dpmi_lock_data(xstart,sizeof(int));
> >    _go32_dpmi_lock_data(xstop,sizeof(int));
> >    _go32_dpmi_lock_data(Ack,sizeof(int));
> >    Intnum = pci(0x3C) & 0xFF;
> >
> >    /* calculate irq mask bit for PIC */
> >    Piraq_isr.pm_offset = (int)(IntDirac);
> >    Piraq_isr.pm_selector = _go32_my_cs();
> >    _go32_dpmi_allocate_iret_wrapper(&Piraq_isr);
> >    if(Intnum < 8)
> >       {
> >       Irqmask = 1 << Intnum;
> >       outp(0x21,inp(0x21)&~Irqmask); /* enable PC IRQ on master */
> >       _go32_dpmi_set_protected_mode_interrupt_vector(Intnum+8,&Piraq_isr); /* hardware irq0 is int 8 */
> >       }
> >    else
> >       {
> >       Irqmask = 1 << (Intnum - 8);
> >       outp(0xA1,inp(0xA1)&~Irqmask); /* enable PC IRQ on slave */
> >       _go32_dpmi_set_protected_mode_interrupt_vector(Intnum+0x68,&Piraq_isr); /* hardware irq0 is int 8 */
> >       }
> >    }
> >
> > static void IntDirac (void)
> > {
> >    float *dualram[2],*iqbuff[2],*ram;
> >    int i,j;
> >   float tmp;
> >
> > //   disable();
> >    dualram[0] = diraq->bufptr[ *(diraq->flag) & 1];
> >    dualram[1] = dualram[0] + 0x4000;
> >    iqbuff[0] = (float *)(TABIQ *)(buffiq+pos_prod)->IQ[0];
> >    iqbuff[1] = (float *)(TABIQ *)(buffiq+pos_prod)->IQ[1];
> >
> >    for (j=0;j<NHITS;j++){
> >            *iqbuff[0]++ = *(float *)(dualram[0]+j**gates);   // Gate0 I
> >            *iqbuff[0]++ = *(float *)(dualram[0]+j**gates+1); // Gate0 Q
> >            ram = (float *)(dualram[0]+j**gates+*xstart);
> >            for (i=0;i< *xstop-*xstart;i++)
> >                 *iqbuff[0]++ = *(float *)ram++;
> >    }
> >   for (j=0;j<NHITS;j++){
> >            *iqbuff[1]++ = *(float *)(dualram[1]+j**gates);   // Gate0 I
> >            *iqbuff[1]++ = *(float *)(dualram[1]+j**gates+1); // Gate0 Q
> >            ram = (float *)(dualram[1]+j**gates+*xstart);
> >            for (i=0;i< *xstop-*xstart;i++)
> >                 *iqbuff[1]++ = *(float *)ram++;
> >    }
> >   pos_prod++;
> >
> >    if (pos_prod == numhits )
> >            pos_prod = 0 ;
> >
> >
> >    *Ack = 0;
> >    if(Intnum > 7)
> >       outp(0xA0,0x20);                /* reset PIC1 */ /* do this first */
> >    outp(0x20,0x20);                /* reset PIC0 */
> >   // enable();
> > }
> > static void End_IntDirac (void) {}