Date: Thu, 4 Nov 1999 10:07:02 +0200 (IST)
From: Eli Zaretskii <eliz AT is DOT elta DOT co DOT il>
X-Sender: eliz AT is
To: Rob Kramer <robk AT cyberway DOT com DOT sg>
cc: djgpp AT delorie DOT com
Subject: Re: DMA despair.
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On Thu, 4 Nov 1999, Rob Kramer wrote:

> > IRQ 10 requires to set up both the Master and the Slave Interrupt 
> > Controllers, and send the EOI command to both of them.  Make sure your 
> > code does this.
> 
> But I'm using _go32_dpmi_chain_protected_mode_interrupt_vector(), so i guess I 
> that's done by the wrapper..  (?)

No, these are two completely different issues.  The DJGPP wrappers take 
care of calling the previous handler for the interrupt associated with 
IRQ10.  But you still need to set up and EOI the master and slave PICs 
because otherwise you won't see any interrupts, or the interrupts will 
stop after the first one.

> I tried this, and the IRR on port A0h (!) shows that IRQ 10s *do* come in! It flips to 
> '4' sometimes. The ISR is always zero however. Getting somewhere! Now to figure 
> out why the thing never gets serviced..

You need to review the way you set up the PIC registers.  Did you enable 
IRQ10 in the slave PIC?  What interrupt do you expect to happen when 
IRQ10 is triggered?