Newsgroups: comp.os.msdos.djgpp From: Peter Berdeklis Subject: Re: MMX Message-ID: Nntp-Posting-Host: chinook.physics.utoronto.ca Sender: news AT info DOT physics DOT utoronto DOT ca (System Administrator) Mime-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Organization: University of Toronto - Dept. of Physics In-Reply-To: <5g04af$pmd@freenet-news.carleton.ca> Date: Wed, 12 Mar 1997 16:01:10 GMT References: <5g04af$pmd AT freenet-news DOT carleton DOT ca> Lines: 22 To: djgpp AT delorie DOT com DJ-Gateway: from newsgroup comp.os.msdos.djgpp On 10 Mar 1997, Paul Derbyshire wrote: > Peter Berdeklis (peter AT atmosp DOT physics DOT utoronto DOT ca) writes: > > If these extensions to C are written they would likely be written in hand > > coded/massaged inline asm. In that case the compiler doesn't need to know > > anything about packing and parallel op's, just which registers are > > invalid (eg. the whole FPU stack). > > In other words, the minimal MMX support would be just to add to inline asm > the ability to specify "%MMX" as one of The Clobbered to mean the FPU > registers. gcc's extended asm already has "f" as the specification for an FPU register ("t" and "u" are for the top and second register of the FPU stack). Since "f" does not specify an FPU register, I would assume that putting it in the clobberred list would invalidate assumptions about any FPU register. If this is the case, then the ability to provide minimal support for the MMX already exists. --------------- Peter Berdeklis Dept. of Physics, Univ. of Toronto