Newsgroups: comp.os.msdos.djgpp From: Peter Berdeklis Subject: Re: SHRD & SHLD instructions Message-ID: Nntp-Posting-Host: chinook.physics.utoronto.ca Sender: news AT info DOT physics DOT utoronto DOT ca (System Administrator) Mime-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Organization: University of Toronto - Dept. of Physics In-Reply-To: <01bc06bc$48a51d10$305098c2@atkinson> Date: Wed, 22 Jan 1997 16:35:38 GMT References: <01bc02ca$a86f3140$305098c2 AT atkinson> <01bc06bc$48a51d10$305098c2 AT atkinson> Lines: 29 To: djgpp AT delorie DOT com DJ-Gateway: from newsgroup comp.os.msdos.djgpp On 20 Jan 1997, Wayne Ross wrote: > Are you sure about that? SHLD & SHRD shift a register's bits left/right and > move bits from another register into the positions left behind., i.e, > > For a SHLD reg1, count, reg2 > > reg1 reg2 > <---------- 0110<--- 1001 > > As the bits from reg1 are shifted left, bits are shifted in from reg2 to > occupy the space. > > For two 16 bit numbers SHLD would perform the same function as SHLL, but > for two 32 bit numbers (one 64 bit number :-) ) it would not. Sorry about that. The correct name is shldl (or shldw for 16 bit registers). The syntax is as follows: shldl count,source,dest where count is an immed. or %cl, giving the shift count, source is the source of the shifted in bits and dest is the shifted reg. This is the exact backwards of the Intel syntax, as usual. Note that only the dest is altered. --------------- Peter Berdeklis Dept. of Physics, Univ. of Toronto