From: Message-Id: <200306231734.h5NHYBjd023462@speedy.ludd.luth.se> Subject: Re: Bugs in unassmbl.c In-Reply-To: "from Esa A E Peuha at Jun 23, 2003 01:51:06 pm" To: djgpp-workers AT delorie DOT com Date: Mon, 23 Jun 2003 19:34:11 +0200 (CEST) X-Mailer: ELM [version 2.4ME+ PL78 (25)] MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset=US-ASCII X-MailScanner: Found to be clean Reply-To: djgpp-workers AT delorie DOT com Errors-To: nobody AT delorie DOT com X-Mailing-List: djgpp-workers AT delorie DOT com X-Unsubscribes-To: listserv AT delorie DOT com Precedence: bulk According to Esa A E Peuha: > On Fri, 20 Jun 2003 ams AT ludd DOT luth DOT se wrote: > > > This seems right too (after the patch i. e.), according to the Intel > > manual, although it's confusing with 16, 24, 32... matching 0x8a, > > 0x8b, 0x8c. > > How do 0x8a and rest relate to the actual opcodes? The numbers used in > the sources are the standard esc codes: if the first two bytes of the > opcodeare (in binary notation) 11011aaa bbcccddd, then the esc code is > aaaccc; if bb is not 11, then the esc code determines the instruction > (except for the memory operand); if bb is 11, then the esc code and ddd > together determine the instruction. I'm far from an expert on ESC opcodes, but this is what I think I've understood: That table is only for when bb != 11. 0 -> 0x88, 8 -> 0x89, 16 -> 0x8a, etc. I. e. aaa in your description above. > > (Perhaps "00... 08... 16..." should be changed to "00, opcodes > > 0x88... 08, opcodes 0x89... 16, opcodes 0x8a..."?) > > I don't think so, at least not until you explain why your notation is > better than the current one. Did I manage to do that? Anyway something like your bitwise description would be just as fine. Perhaps "11011aaa 11bbbccc, aaaccc == index in table, bbb == register/stack index"? Right, MartinS