Message-ID: <034c01c31184$91062480$0600000a@broadpark.no>
From: "Gisle Vanem" <giva AT bgnett DOT no>
To: <djgpp-workers AT delorie DOT com>
References: <E19BwRu-00014b-00 AT phekda DOT freeserve DOT co DOT uk>
Subject: Re: uname and Athlons [PATCH]
Date: Sat, 3 May 2003 16:59:16 +0200
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Reply-To: djgpp-workers AT delorie DOT com

"Richard Dawe" <rich AT phekda DOT freeserve DOT co DOT uk> said:

> + /* What we need is instruction family info in 8-11 bits */
> + family = (cpuid_info & 0x780) >> 8;
> + switch (family)

I dont' get this. Isn't this extracting bits 7-10 (assuming we call the
LSB bit 0).

> +    {
> +    case 0x7: strcpy(u->machine, "i786"); break;
> +    case 0x6: strcpy(u->machine, "i686"); break;
> +    case 0x5: strcpy(u->machine, "i586"); break;
> +    default:
> +    case 0x4: strcpy(u->machine, "i486"); break;
> +    }

> + if ((family == 0x6) && (strcmp(vendor, "AuthenticAMD") == 0))
> +    strcpy(u->machine, "athlon");

Wouldn't this set "athlon" for a "duron" AMD K7 processor too?
Check bit 7..4 to be sure.

--gv