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Date: Thu, 1 Mar 2001 15:47:09 -0600
From: JT Williams <jeffw AT darwin DOT sfbr DOT org>
To: djgpp-workers AT delorie DOT com
Subject: djasm patch #5
Message-ID: <20010301154709.B8889@kendall.sfbr.org>
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Below is the next patch for djasm.  This patch adds support for
the byte/word/double forms of the shift and rotate instructions.

There is one catch.  DJ used `sh[lr]d' to denote Intel's
double-precision shift.  This usage is inconsistent with
every other djasm mnemonic that can reference a byte, word,
or double operand---for which the `d' suffix always denotes
a double operand.  Hence, to be consistent, sh[lr]d should
denote a shift of a double operand.

In this patch, the current double-precision shift instructions
are removed, and `sh[lr]d' is implemented to be consistent with
other mnemonics.  I don't think this breaks any djasm code
currently in CVS; I couldn't find any `*.asm' files that used
the double-precision `shld' or `shrd' instructions.

% find . -name '*\.asm' -exec grep -l 'sh[lr]' '{}' ';'
./src/stub/stub.asm
./src/stub/orig/stub.asm
./src/stub/test/stub.asm
./tests/libc/crt0/teststub.asm

% find . -name '*\.asm' -exec grep 'sh[lr]' '{}' ';'
[snipped list of shift instructions---none were `shld' or `shrd']

The `double-precision' shift instructions (with different mnemonics)
will be returned to djasm in the next patch, together with code to
trap any attempts to use sh[lr]d for double-precision shifts.

Does all this sound reasonable?

-- 
jtw


--- djasm.y	Fri Feb  2 09:21:23 2001
+++ djasm.y.bc	Thu Mar  1 14:39:21 2001
@@ -230,7 +227,7 @@
 %token <i> ARITH2 ARITH2B ARITH2D ARITH2W
 %token <i> LXS MOVSZX MOVSZXB MOVSZXW
 %token <i> JCC JCCL JCXZ LOOP SETCC
-%token <i> SHIFT SHLRD
+%token <i> SHIFT SHIFTB SHIFTD SHIFTW
 %token <i> ONEBYTE TWOBYTE ASCADJ
 %token <i> BITTEST GROUP3 GROUP3B GROUP3D GROUP3W GROUP6 GROUP7 STRUCT
 %token ALIGN ARPL
@@ -522,14 +519,29 @@
   {"pushw", PUSHW, NO_ATTR},
   {"pushd", PUSHD, NO_ATTR},
   {"rcl", SHIFT, 2},
+  {"rclb", SHIFTB, 2},
+  {"rcld", SHIFTD, 2},
+  {"rclw", SHIFTW, 2},
   {"rcr", SHIFT, 3},
+  {"rcrb", SHIFTB, 3},
+  {"rcrd", SHIFTD, 3},
+  {"rcrw", SHIFTW, 3},
   {"ret", RET, NO_ATTR},
   {"retd", RETD, NO_ATTR},
   {"retf", RETF, NO_ATTR},
   {"retfd", RETFD, NO_ATTR},
   {"rol", SHIFT, 0},
+  {"rolb", SHIFTB, 0},
+  {"rold", SHIFTD, 0},
+  {"rolw", SHIFTW, 0},
   {"ror", SHIFT, 1},
+  {"rorb", SHIFTB, 1},
+  {"rord", SHIFTD, 1},
+  {"rorw", SHIFTW, 1},
   {"sar", SHIFT, 7},
+  {"sarb", SHIFTB, 7},
+  {"sard", SHIFTD, 7},
+  {"sarw", SHIFTW, 7},
   {"sbb", ARITH2, 3},
   {"sbbb", ARITH2B, 3},
   {"sbbd", ARITH2D, 3},
@@ -570,10 +582,17 @@
   {"sidt", GROUP7, 1},
   {"sldt", GROUP6, 0},
   {"sal", SHIFT, 4},
+  {"salb", SHIFTB, 4},
+  {"sald", SHIFTD, 4},
+  {"salw", SHIFTW, 4},
   {"shl", SHIFT, 4},
-  {"shld", SHLRD, 0xa4},
+  {"shlb", SHIFTB, 4},
+  {"shld", SHIFTD, 4},
+  {"shlw", SHIFTW, 4},
   {"shr", SHIFT, 5},
-  {"shrd", SHLRD, 0xac},
+  {"shrb", SHIFTB, 5},
+  {"shrd", SHIFTD, 5},
+  {"shrw", SHIFTW, 5},
   {"smsw", GROUP7, 4},
   {"str", GROUP6, 1},
   {"sub", ARITH2, 5},
@@ -1011,21 +1030,16 @@
 
 	| SHIFT REG8 ',' const		{ emitb($4 == 1 ? 0xd0 : 0xc0); modrm(3, $1, $2); if ($4 != 1) emitb($4); }
 	| SHIFT REG8 ',' REG8		{ if ($4 != 1) djerror ("Non-constant shift count must be `cl'"); emitb(0xd2); modrm(3, $1, $2); }
+	| SHIFTB regmem ',' const	{ emitb($4 == 1 ? 0xd0 : 0xc0); reg($1); if ($4 != 1) emitb($4); }
+	| SHIFTB regmem ',' REG8	{ if ($4 != 1) djerror ("Non-constant shift count must be `cl'"); emitb(0xd2); reg($1); }
 	| SHIFT REG16 ',' const       	{ emitb($4 == 1 ? 0xd1 : 0xc1); modrm(3, $1, $2); if ($4 != 1) emitb($4); }
 	| SHIFT REG16 ',' REG8		{ if ($4 != 1) djerror ("Non-constant shift count must be `cl'"); emitb(0xd3); modrm(3, $1, $2); }
+	| SHIFTW regmem ',' const	{ emitb($4 == 1 ? 0xd1 : 0xc1); reg($1); if ($4 != 1) emitb($4); }
+	| SHIFTW regmem ',' REG8	{ if ($4 != 1) djerror ("Non-constant shift count must be `cl'"); emitb(0xd3); reg($1); }
 	| SHIFT REG32 ',' const       	{ emitb(0x66); emitb($4 == 1 ? 0xd1 : 0xc1); modrm(3, $1, $2); if ($4 != 1) emitb($4); }
 	| SHIFT REG32 ',' REG8		{ if ($4 != 1) djerror ("Non-constant shift count must be `cl'"); emitb(0x66); emitb(0xd3); modrm(3, $1, $2); }
-
-	| SHLRD REG16 ',' REG16 ',' const
-	  { emitb(0x0f); emitb($1); modrm(3, $4, $2); emitb($6); }
-	| SHLRD REG16 ',' REG16 ',' REG8
-	  { if ($6 != 1) djerror ("Non-constant shift count must be `cl'");
-	    emitb(0x0f); emitb($1+1); modrm(3, $4, $2); }
-	| SHLRD REG32 ',' REG32 ',' const
-	  { emitb(0x66); emitb(0x0f); emitb($1); modrm(3, $4, $2); emitb($6); }
-	| SHLRD REG32 ',' REG32 ',' REG8
-	  { if ($6 != 1) djerror ("Non-constant shift count must be `cl'");
-	    emitb(0x66); emitb(0x0f); emitb($1+1); modrm(3, $4, $2); }
+	| SHIFTD regmem ',' const	{ emitb(0x66); emitb($4 == 1 ? 0xd1 : 0xc1); reg($1); if ($4 != 1) emitb($4); }
+	| SHIFTD regmem ',' REG8	{ if ($4 != 1) djerror ("Non-constant shift count must be `cl'"); emitb(0x66); emitb(0xd3); reg($1); }
 
 	| STACK				{ stack_ptr = pc; }
 	| START				{ start_ptr = pc; main_obj=1; }